Unit-4

Assembly Language Programming based on Intel 8085/8086
 

4.1 Assembly language programming based on intel 8085/8086. Instructions, data transfer, arithmetic, logic, branch operations

4.1.1 Instructions

An instruction is a binary pattern designed inside a microprocessor to perform a specific function.

• The entire group of instructions that a microprocessor supports is called Instruction Set.
• 8085 has 246 instructions.
• Each instruction is represented by an 8-bit binary value.
• These 8-bits of binary value is called Op-Code or Instruction Byte.

4.1.2 Data Transfer Instructions

These instructions transfer data between registers or between memory and registers. These instructions are used to copy data from source to destination. While copying, the contents of source cannot be modified.

For example: MOV B, C

                      MVI B, 20H

                      LXI H, 4020H

                      LDA 6000H

4.1.3 Arithmetic Instructions

These instructions perform the operations like:

• Addition

• Subtraction

• Increment

• Decrement

For example:   ADD C

ADC M

ADI 40H

DAD HL

SUB B

SUI 20H

INR C

4.1.4 Logical Instructions

The logical operations are:

• AND • OR • XOR • Rotate • Compare • Complement

For example:   CMP C

ANA B

ANI 40H

XRA M

ORA C

RLC

4.1.5 Branch Operation Instructions

These instructions alter the normal sequential flow conditionally or unconditionally.

For example:   JMP 2000H

RET

RST 6

Key takeaway

We use instructions to perform various operations. They are the codes written by the user to instruct the microprocessor to perform several operations like arithmetical, logical etc.

4.2 Looping, counting, indexing

The programming technique used to instruct the microprocessor to repeat task is called looping. The techniques such as counting and indexing are used to set up a loop. The loop can be of two types

Continuous Loop

The loop formed by using unconditional jump instruction. This loop will follow the instructions and repeat the same task until the system is reset.

Conditional Loop

The conditional jump instruction set up a conditional loop. These instructions check the flags such as zero, carry etc and then repeat the specified task if that condition is satisfied. These loops include counting and indexing.

Indexing means to refer objects with sequential numbers. The counting is set up by loading specific count value in the register. It can be incremental or decremental.

Key takeaway

Continuous Loop

The loop formed by using unconditional jump instruction. This loop will follow the instructions and repeat the same task until the system is reset.

Conditional Loop

These loops include counting and indexing.

4.3 Programming techniques

Example-1

Write a program to add two 8-bit numbers.

Explanation:

• LDA 3050 moves the contents of 3050 memory location to the accumulator (A).
• MOV H, A copies contents of accumulator to register H .
• LDA 3051 moves the contents of 3051 memory location to the accumulator.
• ADD H adds contents of A and H. The result is then stored in A. 
•  MOV L, A copies contents of A to L.
• MVI A 00 moves immediate data (i.e., 00) to A.
• ADC A adds contents of A(00), contents of register specified (i.e A) and carry (1).
• MOV H, A copies contents of A (01) to H.
• SHLD 4050 moves the contents of L register in 4050 memory location and contents of H register in 4051 memory location.
• HLT stops program execution.

Example-2 Write a program to subtract two 8-bit numbers

DATA

3501- 96 H.

3502- 38 H.

The result is stored in memory location 3503 H.

RESULT

2503- 58 H.

Example-3

Write a program to add two 16-bit numbers.

We are taking two numbers ABCD + FE2D = 1B9FA

INPUT:

PROGRAM:

RESULT:

5052: FA

5053: B9

5054: 01

Example-4

 WAP for finding lowest & highest no. in data array

WAP for finding lowest no. in data array

DATA:

5000H : 03

5001H : 75

5002H : 98

5003H : 99

RESULT:

4000H : 03

WAP for finding highest no. in data array

DATA:

5000H : 03

5001H : 75

5002H : 98

5003H : 99

RESULT:

4000H : 99

4.4 Counters and time delays

Counters are used to keep track of events. They can be used in any program by loading specific count value in a register through INR or DCR instructions. Time delays are used to set up accurate timing between two events. In time delay a register is loaded with a number (which is the required delay) and the register is decremented until zero is reached. The delay is caused by the clock period of the system.

Time delay using one register

For the instructions below

Now, Let the operating frequency f=2MHz

Then, T=1/f = 0.5μsec

Time delay in loop TL = N10 x No. of T-states in loop x T

                                        = 255x (7+4+) x 0.5

                                        = 1785 μ sec

                                        = 1.8msec

N10: Decimal value of count in delay register

The last cycle requires only 7T states not 10T states as it will not jump back to decrement instruction. So, the adjusted time delay TLA will be

TLA = TL – 3T

       = 1785 – (3x0.5)

       = 1.8msec

Time delay outside the loop To will be

To = No. of T-states x T  [For MVI instruction]

     =7 x 0.5

     = 3.5 μ sec

Total time delay = TLA +To

                               = 1785 μ sec +3.5 μ sec

                               = 1787 μ sec

Time delay using Register Pair

Now, Let the operating frequency f=2MHz

Then, T=1/f = 0.5μsec

Time delay in loop TL = N10 x No. of T-states in loop x T

(2384)H= (9092)10

TL = 9092x24x0.5

     =109msec

The instruction LXI will add 5 μ sec as instruction outside the loop. The total delay will now become

Total time delay = TL +To

                               = 109 msec+ 5 μ sec

                               = 109msec

Time delay loop in loop technique

Here we calculate

Time delay in Loop1 as calculated in time delay using one register

TL1 = 1787μsec

Time delay inside Loop 2 = N10 (TL1+No. of T-states in loop xT)

                                               = 56(1787+21x0.5)

                                               = 100.46msec

Time delay outside the loop To = 7xT = 7x0.5 = 3.5 μsec

Now Total Time Delay = Time delay inside Loop 2+ Time delay outside the loop

                                         = 100.46msec + 3.5 μsec

                                         =10.46msec

Example-1

Write a program for delay subroutine using register

• The microprocessor does not execute other tasks, when the delay subroutine is executed.
• For the delay, we use the instruction execution times.
• Execution of some instructions in a loop, the delay can be generated.
• Some methods for generating delays are as follows:

•     Using NOP instructions
•     Using 8-bit register as counter
•     Using 16-bit register pair as counter.

Using NOP instructions

• It takes four clock pulses for fetching, decoding and executing.
• If the 8085 MPU is working on 4MHz clock frequency, then the internal clock frequency is 2MHz.
• Hence, can easily determine that each clock period is 1/2 of a microsecond.
• So the NOP will be executed in 1/2 * 4 = 2µs.
• If the entire memory uses NOP instruction, then 64K NOP instructions will be executed. Then the overall delay will be 216 * 2µs = 131072µs.
• Hence, it can be used to generate a short time delay of few milliseconds.

Using 8-bit register as counter

7 + ((4*255) + (10*254)) + 7 + 10 = 3584.

So the time delay will be 3584 * 1/3µs = 1194.66µs.

So when small delay is needed, then we can use this technique with some other values in the place of FF.

Using 16-bit register pair as counter

10 + (6 + 4 + 4 + 10) * 65535H – 3 + 10 = 17 + 24 * 65535H = 1572857.

Time delay = 1572857 * 1/3µs = 0.52428s.

Here we are getting nearly 0.5s delay.

Key takeaway

For Time delay using one register

Time delay in loop TL = N10 x No. of T-states in loop x T

The adjusted time delay TLA will be

TLA = TL – 3T

Time delay outside the loop To will be

To = No. of T-states x T 

Time delay loop in loop technique

Time delay in Loop1 as calculated in time delay using one register TL1

Time delay inside Loop 2 = N10 (TL1+No. of T-states in loop xT)

Time delay outside the loop To

Now Total Time Delay = Time delay inside Loop 2+ Time delay outside the loop

4.5 Stacks and subroutines

Stack is set of memory locations which are specified by the programmer in main program. These memory locations are used to store binary information temporarily during execution of program. The stack is shared by programmer and the microprocessor. There is a 16-bit memory address in stack pointer register (SP) of microprocessor. LXI SP, memory address instruction is used to load the SP with specific memory address.

The Stack is assigned the highest memory location so that the program is not affected. By using PUSH instruction, the data bytes in the register pair can be stored in the stack in reverse order. Using POP instruction, they can be again transferred to the respective registers.

The address in the SP register indicates the next two memory locations which are in descending order can be used for storage.

Example-1

Subroutine

It is group of instructions written separately from the main program. We can use this sub program many times in main program by using CALL and RETURN instructions.

Example-1

The CALL instruction requires 5 machine cycles and 18 T-states. The machine cycles are explained below.

M1 Opcode Fetch:  The content of program counter 2040 are placed on address bus and the machine code is fetched using data bus. In the same time the program counter is incremented by one. So, now the new value in program counter is 2041H. After instruction is decoded and executed SP is decremented by 1. This machine cycle needs 6T-states.

M2-M3: These two are memory read cycles.  The 16-bit address of CALL which is 2070H is fetched. The lower order 70H is fetched first and placed in internal register Z. Next the higher order address is fetched which is 20H and placed in register W. For machine cycle M3 the program counter is upgraded to location pointing next instruction. The both machine cycles require 3T states each.

M4-M5: It is storing of program counter. When M4 begins the content of SP register 23FFH is placed on address bus. The higher order is placed on the data bus 20H and stored in stack location 23FFH. Then simultaneously the SP is also decremented by 1(23FEH). In M5 the content of SP is placed on address bus and lower byte of program counter 43H is placed on data bus and stored in stack location 23FEH. The both machine cycles require 3T states each.

RET Execution

At the end of subroutine RET is executed. The program sequence is transferred to 2043H location. This was stored in top two stack locations 23FEH and 23FFH in CALL instruction. The RET requires 3 machine cycles. M1 is the opcade fetch. In M2 content of SP are placed on address bus. The data byte 43H from top of stack is fetched first and stored in Z and SP is incremented by 1. The next byte is copied in M3 i.e 20H and stored in W and SP is again incremented by 1(2400H).

Key takeaway

The Stack is assigned the highest memory location so that the program is not affected. By using PUSH instruction, the data bytes in the register pair can be stored in the stack in reverse order. Using POP instruction, they can be again transferred to the respective registers.

4.6 Conditional call and return instructions

Conditional call Instructions

Conditional Return Instructions

Reference:

1. Gaonkar, Ramesh S , “Microprocessor Architecture, Programming and Applications with 8085”, Penram International Publishing.

2. Ray A K, Bhurchandi K M, “Advanced Microprocessors and Peripherals”, TMH Hall D V, Microprocessor Interfacing’, TMH

3.Liu and, “Introduction to Microprocessor”, TMH

4. Brey, Barry B, “INTEL Microprocessors”, PHI