UNIT 2

Digital Electronics

2.1 Binary, Decimal, Octal and Hexadecimal number systems and conversions

Introduction to number system and conversions

A digital system understands positional number system where there are few symbols called digits and these symbol represents different values depending on their position in the number.

A value of the digit is determined by using

• The digit
• Its position
• The base of the number system

Decimal Number System

• Its the system that we use in our daily life. It has a base 10 and uses 10 digits from 0 to 9.
• Here, the successive positions towards the left of the decimal point represent units, tens, hundreds, thousands and so on.
• Each and every position represents a specific power of the base (10). For example, the decimal number 4321 consists of the digit 1 in the units position, 2 in the tens position, 3 in the hundreds position, and 4 in the thousands position, and its value can be written as

• As a computer programmer, we should understand the following number systems used in computers.

Binary their conversion

• It uses two digits 0 and 1.
• It is also called as base 2 number system.
• Here, each position in any binary number represents a power of the base (2). Example: 23
• The last position represents a y power of the base (2). Example: 2y where y represents the last position.

Example

Binary Number: 101112

Calculating the Decimal Equivalent of binary number −

Note: 101112 is normally written as 10111.

BCD their conversion

BCD numbers are from 0 to 9.

Octal Number System

• It consists of eight digits 0, 1,2,3,4,5,6,7.
• It is also named as base 8 number system.
• Here each position represents a power of the base (8). Example: 82
• The last position represents a y power of the base (8). Example: 8y where y represents the last position .

Example

Octal Number − 125758

Calculating Decimal Equivalent −

Note: 125758 is normally written as 12575 in octal.

Decimal to Any Base System

It includes the following steps:

• Firstly, divide the decimal number which is to be converted by the value of its new base.
• Then, after getting the remainder from the above step make it the rightmost digit (least significant digit) i.e. LSD of new base number.
• Further divide the quotient by the new base.
• Then record the remainder from the above step as the next digit (towards the left) of the new base number.
• Repeat these steps and get remainders from right to left till the quotient becomes zero.
• The last remainder obtained will be the Most Significant Digit (MSD) of the new base number.

For example −

Decimal Number: 2710

Calculating Binary Equivalent −

Hence, the remainders are arranged in the reverse order and we get:

Decimal Number − 2710 = Binary Number − 110112.

Hexadecimal Number System

• It uses 10 digits starting from 0,1,2,3,4,5,6,7,8,9 and 6 letters A,B,C,D,E,F.
• These letters represents numbers as A = 10, B = 11, C = 12, D = 13, E = 14, F = 15.
• It is also known as base 16 number system.
• Here each position represents a power of the base (16). Example 161.
• The last position represents a y power of the base (16). Example: 16y where y represents the last position .

Example −

Hexadecimal Number: 19FDA16

Calculating Decimal Equivalent −

Note − 19FDA16 is normally written as 19FDA in hexa decimal.

Conversions

There are many techniques which are used to convert numbers from one base to another. These are as follows −

• Decimal to any other Base System
• Any Base System to Decimal
• Any Base System to Non-Decimal
• Binary to Octal
• Octal to Binary
• Binary to Hexadecimal
• Hexadecimal to Binary

Any Base System to Decimal System

• Here, the column (positional) value of each digit (this depends on the position of the digit and the base of the number system) is multiplied with the obtained column values of the digits in the corresponding columns.
• The sum the products is then calculated which gives the total equivalent value in decimal.

For example :

Binary Number − 111102

Calculating Decimal Equivalent −

Binary Number − 111102 = Decimal Number − 3010

Any Base System to Non-Decimal System

• The original number is converted to its equivalent decimal number (base 10).
• Then the decimal number so obtained is further converted to the new base number.

Example

Octal Number − 268

Calculating its Binary Equivalent −

Step 1 – Converting octal to Decimal

Octal Number − 268 = Decimal Number − 2210

Step 2 − Converting Decimal to Binary

Decimal Number − 2210 = Binary Number − 101102

Octal Number − 268 = Binary Number − 101102

Binary to Octal

• Dividing the binary digits into groups of three starting from right to left.
• Converting each group of three binary digits into one octal digit.

For example:

Binary Number − 101012

Its Octal Equivalent −

Binary Number − 101012 = Octal Number − 258

Octal to Binary

• Converting each octal digit to a 3 digit binary number and they can be treated as decimal number for this conversion.
• Then combining all the resulting binary groups into a single binary number.

For example:

Octal Number − 258

Its Binary Equivalent −

Octal Number − 258 = Binary Number − 101012

Binary to Hexadecimal

• Dividing the binary digits into groups of four (starting from right to left).
• Then converting each group of four binary digits into one hexadecimal number.

For example:

Binary Number − 101012

Its hexadecimal Equivalent −

Binary Number − 101012 = Hexadecimal Number − 1516

Hexadecimal to Binary

• Converting each hexadecimal digit to a 4 digit binary number and they can be treated as decimal number.
• Combining all the resulting binary groups into a single binary number.

For example:

Hexadecimal Number − 1516

Its Binary Equivalent −

Hexadecimal Number − 1516 = Binary Number − 101012

Binary Arithmetic

It is an essential part of all the digital calculations.

Binary Addition

• It is a basis for binary subtraction, multiplication, division.
• There are four rules which are as follows:

Fig.1 Rules of Binary addition

In fourth step, a sum (1 + 1 = 10) i.e. 0 is written in the given column and a carry of 1 over to the next column is done.

For Example −

Fig.2 Binary addition

Binary Subtraction

Subtraction and Borrow, these are the two words that will be used very frequently for binary subtraction. There rules of binary subtraction are:

Fig.3 Rules of Binary Subtraction

For Example

Fig.4 Binary subtraction

Binary Multiplication

• It is similar to decimal multiplication.
• It is also simpler than decimal multiplication as only 0s and 1s are involved.
• There are four rules of binary multiplication which are:

Fig.5 Rules of Binary Multiplication (Ref. 1)

For Example

Fig.6 Binary Multiplication

Binary Division

• It is similar to decimal division.
• It is also called as the long division procedure.

For Example

Fig.7 Binary Division

Binary system complements

• Complements are used in order to simplify the subtraction operation and the logical manipulations can be done.
• For each radix-r system there are two types of complements:

• The binary system has radix r = 2.
• Therefore, the two types of complements for the binary system are known as 1's complement and 2's complement.

1's complement

• Here, a number is obtained by changing all 1's to 0's and all 0's to 1's.
• This is called as 1's complement.
• For Example :

Fig.8: 1's complement

2's complement

• It is obtained by adding 1 to the Least Significant Bit (LSB) of 1's complement of the number.
• Hence, 2's complement = 1's complement + 1
• For Example:

Fig.9: 2's complement

Octal Number System

• It consists of eight digits 0, 1,2,3,4,5,6,7.
• It is also named as base 8 number system.
• Here each position represents a power of the base (8). Example: 82

• The last position represents a y power of the base (8). Example: 8y where y represents the last position .

Example

Octal Number − 125758

Calculating Decimal Equivalent −

Note: 125758 is normally written as 12575 in octal.

Octal Addition

The octal addition table is as follows:

Fig.10: Octal addition table

• To use the above table, simply follow the example:
• Add 68and 58.
• Locate 6 in the A column then locate the 5 in the B column.
• The point in 'sum' area where these two columns intersect is the 'sum' of two numbers.

68 + 58 = 138.

For Example :

Fig.11: Octal addition  (Ref. 1)

Octal Subtraction

• It follows the same rules as the subtraction of numbers in any other system.
• The only difference is in borrowed number.
• In the decimal system, we borrow a group of 1010.
• In the binary system, we borrow a group of 210.
• But in the octal system we borrow a group of 810.

For Example

Fig.12: Octal subtraction  (Ref. 1)

2.2 Boolean Algebra

• It deals with binary numbers & variables.
• Therefore, also known as Binary Algebra or logical Algebra.
• A mathematician named as George Boole had developed this algebra in 1854.
• The variables that are used in this algebra are known as Boolean variables.
• Considering the range of voltages as logic ‘High’ is represented with ‘1’ and logic ‘Low’ is represented with ‘0’.

Postulates and Basic Laws of Boolean Algebra

Here, the Boolean postulates and basic laws that are used are given underneath.

Boolean Postulates

• Considering the binary numbers 0 and 1, boolean variable (x) and its complement (x’).
• They known as literal.
• The possible logical OR operations are:

x + 0 = x

x + 1 = 1

x + x = x

x + x’ = 1

• Similarly, the possible logical AND operations are:

x.1 = x

x.0 = 0

x.x = x

x.x’ = 0

• These are the simple Boolean postulates and verification can be done by substituting the Boolean variable with ‘0’ or ‘1’.

Laws and Rules of Boolean algebra

Basic Laws of Boolean Algebra

• The three basic laws of Boolean Algebra are:

• Commutative law
• Associative law
• Distributive law

Commutative Law

• The logical operation carried between two Boolean variables when gives the same result irrespective of the order the two variables, then that operation is said to be Commutative. The logical OR & logical AND operations between x & y are shown below

x + y = y + x

x.y = y.x

• The symbol ‘+’ and ‘.’ indicates logical OR operation and logical AND operation.
• Commutative law holds good for logical OR & logical AND operations.

Associative Law

• If a logical OR operation of any two Boolean variables is performed first and then the same operation is performed with the remaining variable providing the same result, then that operation is said to be Associative. The logical OR & logical AND operations of x, y & z are:

x + (y + z) = (x + y) + z

x.(y.z) = (x.y).z

• Associative law holds good for logical OR & logical AND operations.

Distributive Law

• If a logical OR operation of any two Boolean variables is performed first and then AND operation is performed with the remaining variable, then that logical operation is said to be Distributive. The distribution of logical OR & logical AND operations between variables x, y & z are :

x.(y + z) = x.y + x.z

x + (y.z) = (x + y).(x + z)

• Distributive law holds good for logical OR and logical AND operations.
• These are the Basic laws of Boolean algebra and we can verify them by substituting the Boolean variables with ‘0’ or ‘1’.

Boolean analysis of logic circuits

Numerical

• Simplify the Boolean function,

f = p’qr + pq’r + pqr’ + pqr

Method 1

Given

f = p’qr + pq’r + pqr’ +pqr.

In first and second term r is common and in third and fourth terms pq is common.

So, taking out the common terms by using Distributive law we get,

⇒ f = (p’q + pq’)r + pq(r’ + r)

The terms present in first parenthesis can be simplified by using Ex-OR operation.

The terms present in second parenthesis is equal to ‘1’ using Boolean postulate we get

⇒ f = (p ⊕q)r + pq(1)

The first term can’t be simplified further.

But, the second term is equal to pq using Boolean postulate.

⇒ f = (p ⊕q)r + pq

Therefore, the simplified Boolean function is f = (p⊕q)r + pq

Method 2

Given f = p’qr + pq’r + pqr’ + pqr.

Using the Boolean postulate, x + x = x.

Hence we can write the last term pqr two more times.

⇒ f = p’qr + pq’r + pqr’ + pqr + pqr + pqr

Now using the Distributive law for 1st and 4th terms, 2nd and 5th terms, 3rdand 6th terms we get.

⇒ f = qr(p’ + p) + pr(q’ + q) + pq(r’ + r)

Using Boolean postulate, x + x’ = 1 and x.1 = x for further simplification .

⇒ f = qr(1) + pr(1) + pq(1)

⇒ f = qr + pr + pq

⇒ f = pq + qr + pr

Therefore, the simplified Boolean function is f = pq + qr + pr.

Hence we got two different Boolean functions after simplification of the given Boolean function. Functionally, these two functions are same. As per requirement, we can choose one of them.

Numerical

Find the complement of the Boolean function,

f = p’q + pq’.

Solution:

Using DeMorgan’s theorem, (x + y)’ = x’.y’ we get

⇒ f’ = (p’q)’.(pq’)’

Then by second law, (x.y)’ = x’ + y’ we get

⇒ f’ = {(p’)’ + q’}.{p’ + (q’)’}

Then by using, (x’)’=x  we get

⇒ f’ = {p + q’}.{p’ + q}

⇒ f’ = pp’ + pq + p’q’ + qq’

Using x.x’=0 we get

⇒ f = 0 + pq + p’q’ + 0

⇒ f = pq + p’q’

Therefore, the complement of Boolean function, p’q + pq’ is pq + p’q’.

Standard forms of Boolean expressions

• Four product combinations is obtained by combining two variables x and y with logical AND operation. They are called as min terms or standard product terms. The min terms are given as x’y’, x’y, xy’ and xy.
• In the same way, four Boolean sum terms is obtained by combining two variables x and y with logical OR operation. They are called as Max terms or standard sum terms. The Max terms are given as x + y, x + y’, x’ + y and x’ + y’.

The following table represents the min terms and MAX terms for 2 variables.

• If the binary variable is ‘0’, then it is represented as complement of variable in min term and as the variable itself in Max term.
• Similarly, if it is ‘1’, then it is represented as complement of variable in Max term and as the variable itself in min term.
• From the above table, we can easily notice that min terms and Max terms are complement of each other.
• If there are ‘n’ Boolean variables, then there will be 2n min terms and 2n Max terms.

Canonical SoP and PoS forms

• A truth table comprises of a set of inputs and output(s).
• If there are ‘n’ input variables, then there shall be 2n possible combinations comprising of zeros and ones.
• So the value of every output variable depends on the combination of input variables.
• Hence, each output variable have ‘1’ for some combination and ‘0’ for other combination of input variables.

Therefore, we can express each output variable in two ways.

• Canonical SoP form
• Canonical PoS form

Canonical SoP form

• It means Canonical Sum of Products form.
• In this, each product term contains all literals.
• So that these product terms are nothing but the min terms.
• Hence is also known as sum of min terms form.
• Firstly, identification of the min terms is done and then the logical OR of those min terms is taken in order to get the Boolean expression (function) corresponding to that output variable.
• This Boolean function will be in sum of min terms form.
• Then following the same procedure for other output variables too.

Example

Considering  the following truth table.

• Here, the output (f) is ‘1’ for only four combinations of inputs.
• The corresponding min terms are given as p’qr, pq’r, pqr’, pqr.
• By doing logical OR, we get the Boolean function of output (f).
• Hence, the Boolean function of output is,

f = p’qr + pq’r + pqr’ + pqr.

• This is the desired canonical SoP form of output, f.
• It can also be represented as:

f=m3+m5+m6+m7f=m3+m5+m6+m7

f=∑m(3,5,6,7)f=∑m(3,5,6,7)

• First, we represented the function as sum of respective min terms and then, the symbol for summation of those min terms is used.

Canonical PoS form

• It means Canonical Product of Sums form.
• Here In this form, each sum term contains all literals.
• These sum terms are the Max terms.
• Hence, canonical PoS form is also known as product of Max terms form.
• Identification of the Max terms for which the output variable is zero is done and then the logical AND of those Max terms is done in order to get the Boolean expression corresponding to that output variable.
• This Boolean function is in the form of product of Max terms.
• Following the same procedure for other output variables too.

Standard SoP and PoS forms

Standard SoP form

• It stands for Standard Sum of Products form.
• In this, each product term need not contain all literals.
• So, the product terms can or cannot be the min terms.
• Therefore, it is therefore the simplified form of canonical SoP form.

Standard SoP of output variable can be obtained by two steps.

• Getting the canonical SoP form of output variable
• Simplification the above Boolean function.

The same procedure is followed for other output variables too, if there is more than one output variable.

Numerical

Convert the Boolean function into Standard SoP form.

f = p’qr + pq’r + pqr’ + pqr

Solution:

Step 1 – By using the Boolean postulate, x + x = x and also writing the last term pqr two more times we get

⇒ f = p’qr + pq’r + pqr’ + pqr + pqr + pqr

Step 2 – By Using Distributive law for 1st and 4th terms, 2nd and 5th terms, 3rdand 6th terms.

⇒ f = qr(p’ + p) + pr(q’ + q) + pq(r’ + r)

Step 3 – Then Using Boolean postulate, x + x’ = 1 we get

⇒ f = qr(1) + pr(1) + pq(1)

Step 4 – hence using Boolean postulate, x.1 = x we get

⇒ f = qr + pr + pq

⇒ f = pq + qr + pr

This is the required Boolean function.

Standard PoS form

• It stands for Standard Product of Sum form.
• Here, each sum term need not contain all literals.
• So, the sum terms can or cannot be the Max terms.
• Therefore, it is the desired simplified form of canonical PoS form.

Standard PoS form of output variable is obtained by two steps.

• Getting the canonical PoS form of output variable
• Simplification of the above Boolean function.

The same procedure is followed for other output variables too.

Numerical

Convert the Boolean function into Standard PoS form.

f = (p + q + r).(p + q + r’).(p + q’ + r).(p’ + q + r)

Solution:

Step 1 – By using the Boolean postulate, x.x = x and writing the first term p+q+r two more times we get

⇒ f = (p + q + r).(p + q + r).(p + q + r).(p + q + r’).(p +q’ + r).(p’ + q + r)

Step 2 – Now by using Distributive law, x + (y.z) = (x + y).(x + z) for 1st and 4thparenthesis, 2nd and 5th parenthesis, 3rd and 6th parenthesis.

⇒ f = (p + q + rr’).(p + r + qq’).(q + r + pp’)

Step 3 − Applying Boolean postulate, x.x’=0 for simplifying of the terms present in each parenthesis.

⇒ f = (p + q + 0).(p + r + 0).(q + r + 0)

Step 4 − Using Boolean postulate, x + 0 = x we get

⇒ f = (p + q).(p + r).(q + r)

⇒ f = (p + q).(q + r).(p + r)

This is the simplified Boolean function.

Hence, both Standard SoP and Standard PoS forms are Dual to one another.

2.3  De Morgan’s theorem, logic gates (AND, OR, NOT, NAND, NOR, XOR, XNOR)

• It is useful in finding the complement of Boolean function.
• It states that “The complement of logical OR of at least two Boolean variables is equal to the logical AND of each complemented variable”.
• It can be represented using 2 Boolean variables x and y as

(x + y)’ = x’.y’

• The dual of the above Boolean function is

(x.y)’ = x’ + y’

• Therefore, the complement of logical AND of the two Boolean variables is equivalent to the logical OR of each complemented variable.
• Similarly, DeMorgan’s theorem can be applied for more than 2 Boolean variables also.

Simplification of Boolean Functions

Numerical

• Simplify the Boolean function,

f = p’qr + pq’r + pqr’ + pqr

Method 1

Given

f = p’qr + pq’r + pqr’ +pqr.

In first and second term r is common and in third and fourth terms pq is common.

So, taking out the common terms by using Distributive law we get,

⇒ f = (p’q + pq’)r + pq(r’ + r)

The terms present in first parenthesis can be simplified by using Ex-OR operation.

The terms present in second parenthesis is equal to ‘1’ using Boolean postulate we get

⇒ f = (p ⊕q)r + pq(1)

The first term can’t be simplified further.

But, the second term is equal to pq using Boolean postulate.

⇒ f = (p ⊕q)r + pq

Therefore, the simplified Boolean function is f = (p⊕q)r + pq

Method 2

Given f = p’qr + pq’r + pqr’ + pqr.

Using the Boolean postulate, x + x = x.

Hence we can write the last term pqr two more times.

⇒ f = p’qr + pq’r + pqr’ + pqr + pqr + pqr

Now using the Distributive law for 1st and 4th terms, 2nd and 5th terms, 3rdand 6th terms we get.

⇒ f = qr(p’ + p) + pr(q’ + q) + pq(r’ + r)

Using Boolean postulate, x + x’ = 1 and x.1 = x for further simplification .

⇒ f = qr(1) + pr(1) + pq(1)

⇒ f = qr + pr + pq

⇒ f = pq + qr + pr

Therefore, the simplified Boolean function is f = pq + qr + pr.

Hence we got two different Boolean functions after simplification of the given Boolean function. Functionally, these two functions are same. As per requirement, we can choose one of them.

Numerical

Find the complement of the Boolean function,

f = p’q + pq’.

Solution:

Using DeMorgan’s theorem, (x + y)’ = x’.y’ we get

⇒ f’ = (p’q)’.(pq’)’

Then by second law, (x.y)’ = x’ + y’ we get

⇒ f’ = {(p’)’ + q’}.{p’ + (q’)’}

Then by using, (x’)’=x  we get

⇒ f’ = {p + q’}.{p’ + q}

⇒ f’ = pp’ + pq + p’q’ + qq’

Using x.x’=0 we get

⇒ f = 0 + pq + p’q’ + 0

⇒ f = pq + p’q’

Therefore, the complement of Boolean function, p’q + pq’ is pq + p’q’.

LOGIC GATES

The basic gates are namely AND gate, OR gate  & NOT gate.

AND gate

It is a digital circuit that consists of two or more inputs and a single output which is the logical AND of all those inputs. It is represented with the symbol ‘.’.

The following is the truth table of 2-input AND gate.

Here A, B are the inputs and Y is the output of two input AND gate.

If both inputs are ‘1’, then only the output, Y is ‘1’. For remaining combinations of inputs, the output, Y is ‘0’.

The figure below shows the symbol of an AND gate, which is having two inputs A, B and one output, Y.

Fig. : AND gate (ref. 1)

Timing Diagram:

OR gate

It is a digital circuit which has two or more inputs and a single output which is the logical OR of all those inputs. It is represented with the symbol ‘+’.

The truth table of 2-input OR gate is:

Here A, B are the inputs and Y is the output of two input OR gate.

When both inputs are ‘0’, then only the output, Y is ‘0’. For remaining combinations of inputs, the output, Y is ‘1’.

The figure below shows the symbol of an OR gate, which is having two inputs A, B and one output, Y.

Fig. : OR gate (ref. 1)

Timing Diagram:

NOT gate

It is a digital circuit that has one input and one output. Here the output is the logical inversion of input. Hence, it is also called as an inverter.

The truth table of NOT gate is:

Here A and Y are the corresponding input and output of NOT gate. When A is ‘0’, then, Y is ‘1’. Similarly, when, A is ‘1’, then, Y is ‘0’.

The figure below shows the symbol of NOT gate, which has one input, A and one output, Y.

Fig. : NOT gate (ref. 1)

Timing Diagram:

Universal gates

      NAND & NOR gates are known as universal gates.

      We can implement any Boolean function by using NAND gates and NOR gates alone.

NAND gate

It is a digital circuit which has two or more inputs and single output and it is the inversion of logical AND gate.

The truth table of 2-input NAND gate is:

Here A, B are the inputs and Y is the output of two input NAND gate. When both inputs are ‘1’, then the output, Y is ‘0’. If at least one of the input is zero, then the output, Y is ‘1’. This is just the inverse of AND operation.

The image shows the symbol of NAND gate:

Fig.: NAND gate (ref. 1)

NAND gate works same as AND gate followed by an inverter.

Timing Diagram:

NOR gate

It is a digital circuit that has two or more inputs and a single output which is the inversion of logical OR of all inputs.

The truth table of 2-input NOR gate is:

Here A and B are the two inputs and Y is the output. If both inputs are ‘0’, then the output is ‘1’. If any one of the input is ‘1’, then the output is ‘0’. This is exactly opposite to two input OR gate operation.

The symbol of NOR gate is:

                                                           Fig.: NOR gate (ref. 1)

NOR gate works exactly same as that of OR gate followed by an inverter.

Timing Diagram:

Special Gates

Ex-OR gate

It stands for Exclusive-OR gate. Its function varies when the inputs have even number of ones.

The truth table of 2-input Ex-OR gate is:

Here A, B are the inputs and Y is the output of two input Ex-OR gate. The output (Y) is zero instead of one when both the inputs are one.

Therefore, the output of Ex-OR gate is ‘1’, when only one of the two inputs is ‘1’. And it is zero, when both inputs are same.

The symbol of Ex-OR gate is as follows:

Fig.: XOR gate (ref. 1)

It is similar to that of OR gate with an exception for few combination(s) of inputs. Hence, the output is also known as an odd function.

Timing Diagram:

Ex-NOR gate

It stands for Exclusive-NOR gate. Its function is same as that of NOR gate except when the inputs having even number of ones.

The truth table of 2-input Ex-NOR gate is:

Here A, B are the inputs and Y is the output. It is same as Ex-NOR gate with the only modification in the fourth row. The output is 1 instead of 0, when both the inputs are one.

Hence the output of Ex-NOR gate is ‘1’, when both inputs are same and 0, when both the inputs are different.

The symbol of Ex-NOR gate is:

Fig.: XNOR gate (ref. 1)

It is similar to NOR gate except for few combination(s) of inputs. Here the output is ‘1’, when even number of 1 is present at the inputs. Hence is also called as an even function.

Timing Diagram:

COMBINATIONAL CIRCUIT

A Combinational circuit is a circuit in which we combine the different gates. For example encoder, decoder, multiplexer, demultiplexer etc. Some of the characteristics are as follows −

• The output of combinational circuit depends only on the levels present at input terminals at any instant of time.
• It does not use any memory element. Therefore, the previous state of input does not have any effect on the present state of the circuit.
• It can have n number of inputs and m number of outputs.

Block diagram

Fig. : Combinational circuit (ref.2 )

2.4   Combinational and sequential circuits

Half Adder

      It is a combinational circuit which has two inputs and two outputs.

      It is designed to add two single bit binary number A and B.

      It has two outputs carry and sum.

Block diagram

Fig. : Half adder (ref. 2)

Truth Table

Circuit Diagram

Fig.: Half adder (ref. 2)

Full Adder

      It is developed to overcome the drawback of Half Adder circuit.

      It can add two one-bit numbers A and B and a carry C.

      It is a three input and two output combinational circuit.

Block diagram

Fig. : Full adder (ref. 2)

Circuit Diagram

Fig. : Full adder (ref. 2)

Sequential circuits

• A Sequential circuit consists of inputs variable (X), logic gates and output variable (Z).
• Combinational circuit generates an output on the basis of input variable only but Sequential circuit produces an output based on current input and previous output variables.
• This means that it includes memory elements which are capable of storing binary information.
• This binary information is nothing but the state of the sequential circuit at any given time. A latch capable of storing one bit information.

Fig.  Combinational circuit

Fig.  Sequential circuit

There are two types of input to the combinational logic in fig 2 :

1. External inputs which are not controlled by the circuit.
2. Internal inputs which are function of  previous output states.

Secondary inputs are state variables that are produced by the storage elements where as secondary outputs are excitations for those storage elements.

Types of Sequential Circuits –

There are two types of sequential circuit :

      Asynchronous sequential circuit –

• They do not use a clock signal but instead uses the pulses as inputs.
• These circuits are faster because there is clock pulse and can change their state immediately when there is a change in the input signal.
• It is used when speed of operation is important and is independent of internal clock pulse.

Fig.  Asynchronous Sequential circuit

But they are more difficult to design and their output is also uncertain.

      Synchronous sequential circuit – 

• These circuit uses clock signal and level inputs.
• The output pulse is received in the same duration as the clock pulse for the clocked sequential circuits.
• They wait for the next clock pulse to arrive to perform the next operation, these circuits are bit slower as compared to asynchronous circuits.
• Level output changes state at the start of an input pulse and remains in that state until the next input or clock pulse arrives.

Fig.  Synchronous Sequential circuit

• It is used in synchronous counters, flip flops, and in MOORE-MEALY machines.
• It is also used to design Counters, Registers, RAM, etc

2.5   Introduction to flip-flops (S-R & J-K)

SR Flip Flop

JK Flip Flop

Race Around Condition In JK Flip-flop –

• For J-K flip-flop, if J=K=1, and if clk=1 for a long period of time, then output Q will toggle as long as CLK remains high which makes the output unstable or uncertain.
• This problem is known as race around condition in J-K flip-flop.
• This problem can be avoided by ensuring that the clock input is at logic “1” only for a very short time.
• Hence the concept of Master Slave JK flip flop was introduced.

Master Slave JK flip flop –
It is basically a combination of two JK flip-flops connected together in series.

Fig.  Master Slave Flip flop

Working of a master slave flip flop –

1. When the clock pulse goes high, the slave is isolated; J and K inputs can affect the state of the system. The slave flip-flop is isolated when the CP goes low. When the CP goes back to 0, information is transmitted from the master flip-flop to the slave flip-flop and output is obtained.
2. The master flip flop is positive level triggered and the slave flip flop is negative level triggered, hence the master responds prior to the slave.
3. If J=0 and K=1, Q’ = 1 then the master goes to the K input of the slave and the clock forces the slave to reset therefore the slave copies the master.
4. If J=1 and K=0, Q = 1 then the master goes to the J input of the slave and the Negative transition of the clock sets the slave and thus copy the master.
5. If J=1 and K=1, the master toggles on the positive transition and the slave toggles on the negative transition of the clock.
6. If J=0 and K=0, the flip flop becomes disabled and Q remains unchanged.

Timing Diagram of a Master flip flop –

1. When the CP = 1 then the output of master is high and remains high till  CP = 0 because the state is stored.
2. Now the output of master becomes low when the clock CP = 1 and remains low until the clock becomes high again.
3. Thus toggling takes place for a clock cycle.
4. When the CP = 1 then the master is operational but not the slave.
5. When the clock is low, the slave becomes operational and remains high until the clock again becomes low.
6. Toggling takes place during the whole process since the output changes once in a cycle.
7. This makes the Master-Slave J-K flip flop a Synchronous device which passes data with the clock signal.

D Flip Flop

T Flip Flop