Unit – 1
Introduction to Microcontroller and Embedded Processor
A microcontroller is seen as a small computer because of the essential components inside of it; the Central Processing Unit (CPU), the Random-Access Memory (RAM), the Flash Memory, the Serial Bus Interface, the Input/Output Ports (I/O Ports), and in many cases, the Electrical Erasable Programmable Read-Only Memory (EEPROM). Figure shows the main parts and also other parts in the microcontroller.
Figure 1: Parts of a microcontroller.
Design of Microcontroller CPU
The CPU sometimes called a processor or microprocessor, controls all of the instructions/data flow that it receives. You can think of it as the brains of the system, processing all the data input it receives and executes the required instructions. Its two main components are the Arithmetic Logic Unit (ALU), which performs arithmetic and logical operations, and the Control Unit (CU), which handles all of the processor’s instruction executions. Figure shows a usual "machine cycle" that the CPU goes through.
Figure 2: A typical machine cycle that the CPU executes.
Microcontroller RAM
RAM is a component that temporarily stores data, and can be accessed quickly. It provides quick read-and-write access to the storage device. This differs from most other memories as it takes longer for data to be extracted since the data isn’t readily available. You can see it as RAM having access to the surface of data – easily reachable – but anything that dives deeper will require a different type of memory. RAM improves total system performance because it allows the microcontroller to work with more information at the same time. Since RAM is temporary data, its content is always erased when the microcontroller is shut down.
Use of Flash Memory in Microcontrollers
Flash memory is a type of non-volatile memory that, unlike RAM, retains its data for an extended period, even if the microcontroller is turned off. This keeps the saved program that you might have uploaded to the microcontroller. Flash Memory writes to a “block” or “sector” at a time, so if you need to just re-write one byte, Flash Memory will need to re-write the whole block that the byte is in, which can wear out quicker.
EEPROM
EEPROM is like Flash Memory, being a non-volatile memory and retaining its data even after shutdown. The difference is that, while Flash Memory re-writes a “block” of bytes, EEPROM can re-write any specific byte at any time. This extends the life of EEPROM compared to Flash Memory, but also means that it is more expensive.
Serial Bus Interface
A Serial Bus Interface is the serial communication in the microcontroller, sending data one bit at a time. With microcontroller boards, it connects ICs with signal traces on a printed circuit board (PCB). For ICs, they use serial bus to transfer data to reduce the number of pins in a package making them more cost effective. Examples of serial buses in ICs are SPIs or I2Cs.
Microcontroller I/O Ports
I/O ports are what the microcontroller uses to connect to real-world applications. Inputs receive changes in the real-world, from temperature sensing, to motion sensing, to push buttons, and much more. The input then goes to the CPU and decides what to do with that information. When it’s time to do a certain command based on a certain value from the input, it sends a signal to the output ports, where it can range from a simple LED light going off, to running a motor for a certain part, to many more. Figure shows some common input and output components.
Figure 3: Common inputs and output components that are used for microcontroller.
Microcontrollers and Embedded Processors
An embedded processor is a type of microprocessor which is designed into a system to control electrical and mechanical functions. Embedded processors are simple in design, limited in computational power and I/O capabilities, and have minimal power requirements. At a basic level, embedded processors are a CPU chip placed in a system that it helps control.
Embedded processors are often confused with microcontrollers. While they do perform similar functions, they integrate with their given system in different ways. The actual functions they perform can also be different as well.
Microcontrollers are the result of technological advances decreasing the size of controllers. Eventually, all of the components of a controller including I/O devices and memory evolved into a single chip, giving us the “micro” in microcontrollers. These chips are small, self-contained devices that have all of the features necessary to control the system they are embedded in.
Figure 4. 8051 Architecture
Central Processor Unit (CPU)
The brain of any processing device of the microcontroller is the CPU. It monitors and controls all operations performed on these units. It reads program written in ROM memory, executes and does the expected task.
Interrupts
Interrupt is a subroutine call that interrupts the microcontrollers main operations or work and causes it to execute any other program, at the time of operation. It provides a mechanism to put on hold the ongoing operations, execute a subroutine and resume to another type of operation.
8051 has five interrupt sources:
INTO
TFO
INT1
TF1
R1/T1
(INT0) ̅ and (INT1) ̅ are external interrupts negative edge triggered or low level triggered. When these interrupts are activated, the corresponding flags are set except for serial interrupt.
When the processor branches to ISR the interrupt flags are cleared. The external interrupts are timer and serial port interrupts.
Memory
They require memory to save as well as read so that the microcontroller performs specific operations of the task.
The memory which is used to store the program known as code memory or Program memory It is also known as ROM memory.
8051 data memory is used to storing data temporarily for operation known as RAM memory. It has 4K of code memory or program memory and 128 bytes of data memory of RAM.
BUS
A collection of wires that work as communication channel or medium for transfer of data. It consists of 8, 16 or more wires of microcontroller. Thus, they carry 8 bits or 16 bits of data simultaneously. There are two types of buses which are
Address Bus
Data Bus
Address Bus:
Microcontroller 8051 has a 16-bit address bus for transferring data. It addresses memory locations to transfer address from CPU to Memory. It has four addressing modes that are:
Immediate addressing modes.
Bank address (or) Register addressing mode.
Direct Addressing mode.
Register indirect addressing mode.
Data Bus: Microcontroller 8051 has 8 bits of data bus used to carry data for applications.
Oscillator
The 8051 microcontroller has an on-chip oscillator that acts as a clock source for CPU of microcontroller. The output pulses of the oscillator are stable. Therefore, it enables synchronized work for all the parts of Microcontroller system.
Input/output Port
To control the operation of machines microcontroller is used in embedded systems. To connect to other machines, devices or peripherals I/O interfacing ports is required. Microcontroller 8051 has 4 input and output ports to connect to other peripherals
Timers/Counters
8051 microcontroller has two 16-bit timers and counters. The counters are again divided into 8-bit register. Timers are used for measurement of time intervals to determine pulse width.
Figure 5: 8051 internal block diagrams
It is an 8-bit microcontroller. It is built with 40 pins DIP (dual inline package), 4kb of ROM storage and 128 bytes of RAM storage, 2 16-bit timers. It consists of are four parallel 8-bit ports, which are programmable as well as addressable as per the requirement.
The reasons for the popularity of 8051 Microcontroller are –
- Simple to integrate in any electronic device.
- Affordable.
- Simple architecture.
- Easy instruction set.
- Low computing power.
CPU
The CPU act as a mind of any processing machine. It synchronizes and manages all processes that are carried out in microcontroller. The user has no power to control the functioning of CPU. It interprets the program stored in ROM and carries out from storage and then performs it projected duty. CPU manage the different types of registers available in 8051 microcontrollers.
It is the heart of the Microcontroller that mainly comprises of an Arithmetic Logic Unit (ALU) and a Control Unit (CU) and other important components. The CPU is the primary device in communicating with peripheral devices like Memory, Input and Output.
Figure 6: CPU
ALU
ALU performs all arithmetic and logical functions.
Addition, subtraction with carry, and multiplication are categorized as arithmetic operations.
Logical AND, OR and exclusive OR (XOR) as logical operations.
Address, Data Bus and Control Bus
A bus consists of group of wires to transfer data from one location to another within the system. Buses reduce the number of paths or cables needed to set up connection between component.
There are two kinds of buses - Data Bus and Address Bus
Data Bus: The purpose of data bus is to transfer data. It acts as a channel for data to travel.
Address Bus: The purpose of address bus is to transfer information but not data. The information tells from where within the components, the data should be sent to or received from.
Control bus - carries control signals from the processor to other components. The control bus also carries the clock's pulses. The control bus is unidirectional
Working Registers
Registers are known as data storage devices. There are two registers namely Register A and Register B. Register A is used as an accumulator and Register B as general -purpose register. The output of mathematical and logical instructions is stored in these registers.
The operations of addition, subtraction, multiplication and division are performed by Register A. Register B is for multiplication and division which are carried by Register A. For data transfers between microcontroller and external memory Register A is involved.
8051 has four Register banks.
When the 8051 is first booted up Register bank 0 (addresses 00h through 07h) is used by default.
The internal memory supports 4 register banks.
The first 8 bytes (00h – 07h) are “register bank 0”.
Followed by Bank1 (08 – 0F),
Bank2 (10 – 17),
Bank3 (18 – 1F).
Register banks reside in the first 32 bytes of Internal RAM.
PSW (PROGRAM STATUS WORD)
This is an 8-BIT register. The Program Status Word (PSW) contains status bits that reflect the current CPU state.
A (ACCUMULATOR)
Accumulator is an 8-bit register. It holds the result of most of arithmetic and logic operations. This register is usually accessed by direct addressing. It is both byte and bit addressable.
B (EXTENSION REGISTER)
The major purpose of B (Extension register) register is executing multiplication and division. This register is directly accessed when we are writing our code in assembly language. The 8051 micro controller has a single instruction for multiplication (MUL) and division (DIV).
SP (STACK POINTER)
Stack pointer is an 8- bit register, the direct address of SP is 81H and it is only byte addressable that means individual bits of stack pointer cannot be accessed. The content of the stack pointer points to the last stored location of system stack.
To store something new in system stack, the SP must be incremented by 1 first and then execute the “store” command.
- Push increments the SP and writes data.
- POP reads data and then decrements the SP.
- Stack is kept in the internal RAM and is restricted to 128 bytes.
- Top most address of stack is 7F.
DPTR (DATA POINTER REGISTER)
This is a 16-bit register. It is used to access external code or data memory
The Data Pointer (DPTR) is the 8051’s only user-accessible 16-bit (2-byte) register.
Every Timer needs a clock to work, and 8051 provides it from an external crystal which is the main clock source for Timer. The internal circuitry in the 8051 microcontrollers provides a clock source to the timers which is 1/12th of the frequency of crystal attached to the microcontroller, also called Machine cycle frequency.
Fig.7: 8051 Timer Clock
For example, suppose we have a crystal frequency of 11.0592 MHz then the microcontroller will provide 1/12th i.e.
Timer clock frequency= (Xtal Osc.frequency)/12 = (11.0592 MHz)/12 = 921.6 KHz
Period T= 1/(921.6 kHz)=1.085 μS
The Data Pointer (DPTR) is the 8051’s only user-accessible 16-bit (2-byte) register. The Accumulator, R0–R7 registers and B register are 1-byte value registers. DPTR is meant for pointing to data. It is used by the 8051 to access external memory using the address indicated by DPTR. DPTR is the only 16-bit register available and is often used to store 2-byte values.
PSW (program status word) register: The program status word (PSW) register is an 8-bit register. It is also referred to as the flag register. Although the PSW register is 8 bits wide, only 6 bits of it are used by the 8051. The two unused bits are user-definable flags.
Four of the flags are called conditional flags, meaning that they indicate some conditions that result after an instruction is executed. These four are CY (carry), AC (auxiliary carry), P (parity), and OV (overflow).
The bits PSW.3 and PSW.4 are designated as RSO and RSI, respectively, and are used to change the bank registers. The PSW.5 and PSW.l bits are general-purpose status flag bits and can be used by the programmer for any purpose.
CY | AC | P0 | RS1 | RS0 | OV | - | P |
CY | PSW.7 | Carry flag |
AC | PSW.6 | Auxiliary carry flag |
F0 | PSW.5 | Available to user for general purpose |
RS1 | PSW.4 | Register Bank selector bit 1 |
RS0 | PSW.3 | Register Bank selector bit 0 |
OV | PSW.2 | Overflow flag |
--- | PSW.1 | User-definable bit |
P | PSW.0 | Parity flag Set/Cleared by hardware each instruction cycle to indicate an odd/even number of bits in the accumulator. |
RS1 | RS2 | Register Bank | Address |
0 | 0 | 0 | 00H – 07H |
0 | 1 | 1 | 08H-0FH |
1 | 0 | 2 | 10H-17H |
1 | 1 | 3 | 18H-1FH |
● CY, the carry flag
This flag is set whenever there is a carry out from the D7 bit. This flag bit is affected after an 8-bit addition or subtraction. It can also be set to 1 or 0 directly by an instruction such as “SETB C” and “CLR C” where “SETB C” stands for “set bit carry” and “CLR C” for “clear carry”.
● AC, the auxiliary carry flag
If there is a carry from D3 to D4 during an ADD or SUB operation, this bit is set; otherwise, it is cleared. This flag is used by instructions that perform BCD (binary coded decimal) arithmetic.
● P, the parity flag
The parity flag reflects the number of 1 s in the A (accumulator) register only. If the A register contains an odd number of Is, then P = 1. Therefore, P = 0 if A has an even number of Is.
● OV, the overflow flag
This flag is set whenever the result of a signed number operation is too large, causing the high-order bit to overflow into the sign bit. In general, the carry flag is used to detect errors in unsigned arithmetic operations. The overflow flag is only used to detect errors in signed arithmetic operations.
8051 Register Banks and Stack
Fig.8: Register bank
8051 consists of four register banks, such as Bank0, Bank1, Bank2, Bank3 which are selected by the PSW (Program Status Word) register. These register banks are present in the internal RAM memory of the 8051 microcontroller and are used to process the data when the microcontroller is programmed.
8051 by default is powered up with register bank 0; and, by using the Program Status Word (PSW), we can switch to other banks. The two bits of PSW are used for switching between the register banks. These two bits are accessed by the bit-addressable instructions SETB and CLR.
Based on the possible combinations of RS1 and RS0 of PSW, the register bank is changed accordingly, i.e., if RS1 and RS0 are 0, then the Bank 0 is selected. Similarly, Bank1, 2&3 are selected as per the values of RS1 and RS0.
Stack Memory Allocation
The stack is an area of random-access memory (RAM) allocated to hold temporarily all the parameters of the variables. The stack is also responsible for reminding the order in which a function is called so that it can be returned correctly. Whenever the function is called, the parameters and local variables associated with it are added to the stack (PUSH).
When the function returns, the parameters and the variables are removed (“POP”) from the stack. Therefore, a program’s stack size changes continuously while the program is running.
Stack:
The stack is a section of RAM used by the CPU to store information temporarily. This information could be data or an address. The CPU needs this storage area since there are only a limited number of registers.
The register used to access the stack is called the SP (stack pointer) register. The stack pointer is 8 bits wide, which takes values of 00 to FFH.
When the 8051 is powered up, the SP register contains value 07. This means that RAM location 08 is the first location used for the stack by the 8051. The storing of a CPU register in the stack is called a PUSH, and pulling the contents off the stack back into a CPU register is called a POP.
Pushing onto the stack
In the 8051 the stack pointer (SP) points to the last used location of the stack. When we push data onto the stack, the stack pointer (SP) is incremented by one.
The SP is decremented when data is pushed onto the stack.
For example, when PUSH is executed, the contents of the register are saved on the stack and SP is incremented by 1.
For example, the instruction “PUSH 1″ pushes register Rl onto the stack.
Show that the stack and stack pointer for the following. Assume the default stack area and register 0 is selected.
MOV R6, #25H
MOV R1,#12H
MOV R4, #0F3H
PUSH 6
PUSH 1
PUSH 4
Solution:
| After PUSH 6 | After PUSH 1 | After PUSH 4 |
0B | 0B | 0B | 0B |
0A | 0A | 0A | 0A F3 |
09 | 09 | 09 12 | 09 12 |
08 | 08 25 | 08 25 | 08 25 |
Start SP=07 SP=08 SP=09 SP=0A
Popping from the stack
Popping the contents of the stack back into a given register is the opposite process of pushing. With every pop, the top byte of the stack is copied to the register specified by the instruction and the stack pointer is decremented once.
Example:
Examine the stack shows the contents of the registers and SP after execution of the following instructions.
POP 3 ; POP stack into R3
POP 5; POP stack into R5
POP 2; POP stack into R2
Solution:
| After PUSH 6 | After PUSH 1 | After PUSH 4 |
0B 54 | 0B | 0B | 0B |
0A F9 | 0A F9 | 0A | 0A |
09 76 | 09 76 | 09 76 | 09 |
08 6C | 08 6C | 08 6C | 08 6C |
Start SP=0B SP=0A SP=09 SP=08
Register A/Accumulator
The Accumulator (sometimes referred to as Register A also) holds the result of most of arithmetic and logic operations. ACC is usually accessed by direct addressing and its physical address is E0H. Accumulator is both byte and bit addressable.
Fig.9: Register A
Register B
The major purpose of this register is in executing multiplication and division. The 8051 micro controller has a single instruction for multiplication (MUL) and division (DIV).
Ex: MUL A, B – When this instruction is executed, data inside A and data inside B is multiplied and answer is stored in A.
Note: For MUL and DIV instructions, it is necessary that the two operands must be in A and B.
Fig.10: Register B
Port Registers
4 Input/Output ports named P0, P1, P2 and P3 has got four corresponding port registers with same name P0, P1, P2 and P3. Data must be written into port registers first to send it out to any other external device through ports. Similarly, any data received through ports must be read from port registers for performing any operation. All 4 port registers are bit as well as byte addressable.
Fig.11: Port Registers
From the figure: -
- The physical address of port 0 is 80
- The physical address of port 1 is 90
- And that of port 2 is A0
- And that of port 3 is B0
Stack Pointer
Stack pointer is an 8-bit register, the direct address of SP is 81H and it is only byte addressable, which means you can’t access individual bits of stack pointer. The content of the stack pointer points to the last stored location of system stack. To store something new in system stack, the SP must be incremented by 1 first and then execute the “store” command. Usually after a system reset SP is initialized as 07H and data can be stored to stack from 08H onwards.
Fig.12: Stack Pointer
Setting bit 0 will move the micro controller to Idle mode and Setting bit 1 will move the micro controller to Power down mode.
Processor Status Word (PSW)
The picture below shows PSW register and the way register banks are selected using PSW register bits – RS1 and RS0. PSW register is both bit and byte addressable. The physical address of PSW starts from D0H. The individual bits are then accessed using D1, D2 … D7.
Fig.13: PSW
Bit No | Bit Symbol | Direct Address | Name | Function |
0 | P | D0 | Parity | This bit will be set if ACC has odd number of 1’s after an operation. If not, bit will remain cleared. |
1 | – | D1 |
| User definable bit |
2 | OV | D2 | Overflow | OV flag is set if there is a carry from bit 6 but not from bit 7 of an Arithmetic operation. It’s also set if there is a carry from bit 7 (but not from bit 6) of Acc |
3 | RS0 | D3 | Register Bank select bit 0 | LSB of the register bank select bit. Look for explanation below this table. |
4 | RS1 | D4 | Register Bank select bit 1 | MSB of the register bank select bits. |
5 | F0 | D5 | Flag 0 | User defined flag |
6 | AC | D6 | Auxiliary carry | This bit is set if data is coming out from bit 3 to bit 4 of Acc during an Arithmetic operation. |
7 | CY | D7 | Carry | Is set if data is coming out of bit 7 of Acc during an Arithmetic operation. |
There are 4 register banks named 0,1,2 and 3. Each bank has 8 registers named from R0 to R7. At a time only one register bank can be selected. Selection of register bank is made possible through PSW register bits PSW.3 and PSW.4, named as RS0 and RS1.These two bits are known as register bank select bits as they are used to select register banks.
Fig.14: Processor Status word
SFR | Address | Function |
DPH | 83 | Data pointer registers (High). Only byte addressing possible. |
DPL | 82 | Data pointer register (Low). Only byte addressing possible. |
IP | B8 | Interrupt priority. Both bit addressing and byte addressing possible. |
IE | A8 | Interrupt enable. Both bit addressing and byte addressing possible. |
SBUF | 99 | Serial Input/Output buffer. Only byte addressing is possible. |
SCON | 98 | Serial communication control. Both bit addressing and byte addressing possible. |
TCON | 88 | Timer control. Both bit addressing and byte addressing possible. |
TH0 | 8C | Timer 0 counter (High). Only byte addressing is possible. |
TL0 | 8A | Timer 0 counter (Low). Only byte addressing is possible. |
TH1 | 8D | Timer 1 counter (High). Only byte addressing is possible. |
TL1 | 8B | Timer 1 counter (Low). Only byte addressing is possible. |
TMOD | 89 | Timer mode select. Only byte addressing is possible. |
Pins Of 8051
Figure.15: Pin Diagram of 8051
Pin out Description:
Pin 1-8 | PORT1- Each of these pins can be configured as an input or output. |
Pin 9 | RESET- A logic set on this pin disables the microcontroller and clears the contents of most registers. In other words, a positive voltage on this pin resets the microcontroller. |
Pin 10-17 | PORT -3: Similar to Port 1. Each pin serves as general output or input. Besides all of them have alternate functions. |
Pin 10 RXD | Serial Asynchronous Communication Input or Serial Synchronous Communication Output. |
Pin 11 TXD | Serial Asynchronous Communication Output or Serial Synchronous Communication clock output |
Pin 12 INT0 | External Interrupt 0 input |
Pin 14 INT1 | External Interrupt 1 input |
Pin 15 T0 | T0 Counter 0 clock input |
Pin16 T1 | T1 Counter 1 clock input |
Pin 17 RD | Read from external RAM |
Pin 18, 19 XTAL2, XTAL1 | Internal oscillator input and output. A quartz crystal which specifies operating frequency is usually connected to these pins. |
Pin 20 GND | Ground |
Pin 21-28 Port 2 | If there is no intention to use external memory then these port pins are configured as general inputs/outputs. In case external memory is used, the higher address byte, i.e., addresses A8-A15 will appear on this port. Even though memory with capacity of 64Kb is not used, which means that not all eight port bits are used for its addressing, the rest of them are not available as inputs/outputs. |
Pin 29 PSEN | If external ROM is used for storing program, then a logic zero (0) appears on it every time the microcontroller reads a byte from memory. |
Pin 30 ALE | Prior to reading from external memory, the microcontroller puts the lower address byte (A0-A7) on P0 and then activates the ALE output. After receiving signal from ALE pin, the external latch latches the state of P0 and uses it as a memory chip address. Immediately the ALE pin is returned to its previous logic state and P0 is now used as a Data Bus. |
Pin 31 EA | By applying logic zero to this pin, P2 and P3 are used for data and address transmission whether there is internal memory or not. It means that even if there is a program written to the microcontroller, it will not be executed. Instead, the program written to external ROM and executed. By applying logic one to the EA pin, the microcontroller will use both memories, first internal then external if present. |
Pin 32-39 PORT 0 | Similar to P2, if external memory is not used, these pins can be used as general inputs/outputs. Otherwise, P0 is configured as address output (A0-A7) when the ALE pin is driven high (1) or as data output (Data Bus) when the ALE pin is driven low (0). |
Pin 40 VCC | +5V power supply |
8051 microcontrollers have 4 I/O ports each of 8-bit, which can be configured as input or output. Hence, total 32 input/output pins allow the microcontroller to be connected with the peripheral devices.
- Pin configuration, i.e., the pin can be configured as 1 for input and 0 for output as per the logic state.
- Input/Output (I/O) pin − All the circuits within the microcontroller must be connected to one of its pins except P0 port because it does not have pull-up resistors built-in.
The 8051 Microcontroller Memory is separated into Program Memory (ROM) and Data Memory (RAM). The Program Memory of the 8051 Microcontroller is used for storing the program to be executed, which means instructions. The Data Memory is used for storing temporary variable data and intermediate results.
Program Memory (ROM) of 8051
The code or instructions which are to be executed are stored in the Program Memory, also called as the ROM of the Microcontroller.
Figure 16. Program Memory
In 4KB Internal ROM, the address space is 0000H to 0FFFH. If the program addresses exceed this value, CPU will automatically fetch the code from the external Program Memory.
For External Access (EA Pin) must be pulled HIGH at this condition the CPU first fetches instructions from the Internal Program Memory in the address range of 0000H to 0FFFFH. If it exceeds the memory addresses limit, instructions are fetched from external ROM in address range of 1000H to FFFFH.
Figure 17. External access
There is also an alternative method to fetch the instructions where the Internal ROM is ignored and instructions are fetched only from External Program Memory (External ROM).
For this purpose, EA pin must be connected to GND. The memory addresses of external ROM will be from 0000H to FFFFH.
Figure 18. External Program Memory
Data Memory (RAM)
Data Memory or RAM stores temporary data and intermediate results generated during the normal operation of the microcontroller.
Currently, 8051 Microcontroller has 256B of RAM. The first 128B memory addresses from 00H to 7FH is divided in to Working Registers. They are organized as Register Banks, Bit – Addressable Area and General-Purpose RAM known as Scratchpad area.
The first 128B of RAM (from 00H to 7FH), the first 32B of memory from addresses 00H to 1FH consists of 32 Working Registers organized into four banks with 8 Registers in each Bank.
Fig.19: (Direct and Indirect Addressing) (Direct Addressing) (Indirect Addressing)
The 4 banks are named as Bank0, Bank1, Bank2 and Bank3. Each Bank consists of 8 registers R0 – R7. Each Register can be addressed either by name or by address.
To address the register by name, first the corresponding bank is selected. In order to select the bank, RS0 and RS1 bits of the Program Status Word (PSW) and Register (RS0 and RS1 are 3rd and 4th bits in the PSW Register) are used.
When addressing these Register for example 12H the corresponding bank may or may not be selected. (12H corresponds to R2 in Bank2).
The next 16B of the RAM that is from 20H to 2FH are Bit – Addressable memory locations. A total of 128 bits can be addressed individually using 00H to 7FH or an entire byte can be addressed as 20H to 2FH.
The final 80B of the internal RAM addresses are from 30H to 7FH which is the general-purpose RAM area are byte addressable.
These lower 128B of RAM can be addressed directly or indirectly.
All 8051 microcontrollers have 4 I/O ports each comprising 8 bits which can be configured as inputs or outputs. Accordingly, in total of 32 input/output pins enabling the microcontroller to be connected to peripheral devices are available for use.
To configure a microcontroller pin as an input, it is necessary to apply a logic zero (0) to appropriate I/O port bit.
To configure a microcontroller pin as an input, it is necessary to apply a logic one (1) to appropriate port. In this case, voltage level on appropriate pin will be 5V (as is the case with any TTL input.
Port 0
Figure 20: Input
If any pin of this port is configured as an input, then it acts as if it “floats”. Such an input has unlimited input resistance and indetermined potential.
Figure 21: Output
When the pin is configured as an output, it acts as an “open drain”. By applying logic 0 to a port bit, the appropriate pin will be connected to ground (0V). To apply logic 1 (5V) on this output pin, it is necessary to build in an external pull-up resistor.
Port 1
P1 is a true I/O port, because it doesn't have any alternative functions as is the case with P0, but can be configured as general I/O only. It has a pull-up resistor built-in and is completely compatible with TTL circuits.
Port 2
P2 acts similarly to P0 when external memory is used. Pins of this port occupy addresses intended for external memory chip. This time it is about the higher address byte with addresses A8-A15. When no memory is added, this port can be used as a general input/output port showing features similar to P1.
Port 3
All port pins can be used as general I/O, but they also have an alternative function. To use these alternative functions, a logic one (1) must be applied to appropriate bit of the P3 register.
Fig.22: Circuit diagram to interface external data ROM with 8051
Code to interface external data ROM with 8051
ORG 0000H
MYXDATA EQU 1000H; 1000H, location where data is stored externally
COUNT EQU 100; To receive all 100 bytes of data
MOV DPTR, #MYXDATA; Move DPTR to 1000H location
MOV R0, #COUNT; Load R0 with 100
Rep: MOVX A, @DPTR; Copy data from location pointed by DPTR to acc
MOV P1, A; Move contents of acc to P1
INC DPTR; Inc DPTR to next ROM location
DJNZ R0, rep; Repeat until all 100 bytes are received
Stay: SJMP stay; Stay here forever
END
External RAM:
Step 1: Connect RD to OE of ext. RAM.
Step 2: Connect WR to WE of ext. RAM.
Step 3: Connect active low input of NAND gate to CE of external RAM, where the input to NAND gate is address lines A15, A14, and A13. We’ve given 0 1 0 to these lines to access the 8000H location of the external RAM.
Fig.23: Interfacing
There are two 16-bit timer registers are known as Timer0 and Timer1. The timer registers are used as Timer mode and Counter mode. The only difference in these two modes is the source for incrementing the timer registers.
Timer Mode
In timer mode, it counts internal machine cycles .So, this register gets incremented for each machine cycle. When the clock frequency is 12MHz, timer register is incremented for every millisecond. It ignores external timer input pin in this mode.
Counter Mode
In counter mode, it counts external events. The timer register gets incremented for every 1 to 0 transition in the external input pin. This type of transitions is referred as events.
The external input pins are sampled once for each machine cycle. In order to determine 1or 0 transitions another machine cycle is required.
Therefore, atleast two machine cycles are required in this mode. When frequency is12MHz the maximum count frequency will be 12MHz/24 = 500KHz. So, for event counting time duration is 2 µs.
Timer or Counter has four different modes. Mode 0 to Mode 2 are for both Timer/Counter. Mode 3 represent different meaning for each timer register. There is a register called TMOD which can be programmed to configure these timers or counters.
The Serial port is used for serial communication in mode 1 and 3. For baud rate generation timer1 is used. Hence, Timer0 is available for timer or counter operations.
TMOD Register
TMOD(Timer Mode) is an SFR. The address of this register is 89H. This is not bit-addressable.
Fig.24:TMOD
Mode 0 of Timer/Counter
Mode 0 operation is 8-bit timer or counter with 5-bit pre-scaler. It is 13-bit timer/counter. Which uses 5 bits of TL0 or TL1 and 8-bits of TH0 or TH1.
Figure 25. Mode 0
Mode 1 of Timer/Counter
Mode 1 operation is 16-bit timer or counter. In the following diagram, Mode 1 is used for Timer0.
Figure 26. Mode 1
Mode 2 of Timer/Counter
Mode 2 operation is 8-bit auto reload timer or counter. Mode 2 is used for Timer1.
Figure 27. Mode 2
Mode 3 of Timer/Counter
Mode 3 is different for Timer0 and Timer1. When Timer0 is working in mode 3, TL0 will be used as 8-bit timer/counter. It will be controlled by standard Timer0 control bits, T0 and INT0 inputs. TH0 is used as 8-bit timer not counter. This is controlled by Timer1 Control bit TR1. When the TH0 overflows from FFH to 00H, TF1 is set to 1. In the following diagram, Timer0 is in Mode 3.
Figure 28. Mode 3
Operation:
- It controls the running of 8-bit timer/counter TL0 like Mode 0, 1, or 2. The running of TH0 is controlled by TR1 bit. So, the gate bit in this mode for Timer0 has no specific role.
- The mode 3 is present for applications requiring an extra 8-bit timer/counter. In Mode 3 of Timer0, 8051 has three timers. One 8-bit timer by TH0, another8-bit timer/counter by TL0, and one 16-bit timer/counter by Timer1.
- If Timer0 is in mode3, and Timer1 is working on either 0, 1 or 2, then the gun control of the Timer1 is activated when the gate bit is low or INT1 is high. The run control is deactivated when the gate is high and INT1 is low.
Figure 29. Interrupt Structure of 8051.
8051 has five interrupts. These are INT0, INT1,TO ,T1 , TI/RI. All these interrupts can be enabled or disabled by IE (interrupt enable) register.
Interrupt Enable (IE)Register
This register can be used to enable or disable interrupts by programming. It is an SFR with address A8H. This byte is bit addressable hence can be programmed by the user. Every bit in this register has a specific meaning.
Interrupt Priority (IP) Register
The five interrupts can be either one or two interrupt level. The priority levels are level 1 and level 0. Higher Priority is indicated by level 1 and level 0 indicates lower priority. To store priority levels for each interrupt IP register is used. This is bit addressable SFR with address B8H.
External Interrupt
The external interrupts are INT0 and INT1. The TCON register can be used to program external interrupts to edge or level triggered. The TCON is Timer Control. TCON is another bit addressable SFR. The address is 88H.
References:
- Microprocessor Architecture, Programming, and ...Book by Ramesh S. Gaonkar
- 8085 Microprocessor: Programming and Interfacing Book by N. K. Srinath
- 8085 Microprocessors & Its Application Book by Nagoorkani
- C and the 8051: Building efficient applications Book by Thomas W. Schultz
- MICROCONTROLLER Book by V. Udayashankara