Unit - 6
80387 Coprocessor and introduction to Microcontrollers
1. Control registers (CR0, CR1, CR2, CR3, and CR4; ) determine operating mode of the processor and the characteristics of the currently executing task. These registers are 32 bits in all 32-bit modes and compatibility mode.
2. In 64-bit mode, control registers are expanded to 64 bits. The MOV CRn instructions are used to manipulate the register bits.
3. Operand-size prefixes for these instructions are ignored. The following is also true:•The control registers can be read and loaded (or modified) using the move-to-or-from-control-registers forms of the MOV instruction. In protected mode, the MOV instructions allow the control registers to be read or loaded (at privilege level 0 only).
4. This restriction means that application programs or operating-system procedures (running at privilege levels 1, 2, or 3) are prevented from reading or loading the control registers.•Bits 63:32 of CR0 and CR4 are reserved and must be written with zeros.
5. Writing a nonzero value to any of the upper 32 bits results in a general-protection exception, #GP(0). •All 64 bits of CR2 are writable by software. •Bits 51:40 of CR3 are reserved and must be 0.
6. The MOV CRn instructions do not check that addresses written to CR2 and CR3 are within the linear-address or physical-address limitations of the implementation. •Register CR8 is available in 64-bit mode only. The control registers are summarized below, and each architecturally defined control field in these control registers is described individually.
7. the width of the register in 64-bit mode is indicated in parenthesis (except for CR0).•CR0 — Contains system control flags that control operating mode and states of the processor. •CR1 — Reserved.•CR2 — Contains the page-fault linear address (the linear address that caused a page fault).•CR3 — Contains the physical address of the base of the paging-structure hierarchy and two flags (PCD and PWT). Only the most-significant bits (less the lower 12 bits) of the base address are specified; the lower 12 bits of the address are assumed to be 0.
8. The first paging structure must thus be aligned to a page (4-KByte) boundary. The PCD and PWT flags control caching of that paging structure in the processor’s internal data caches (they do not control TLB caching of page-directory information).
9. When using the physical address extension, the CR3 register contains the base address of the page-directory.
Key takeaways
- Register CR8 is available in 64-bit mode only. The control registers are summarized below, and each architecturally defined control field in these control registers is described individually.
- In 64-bit mode, control registers are expanded to 64 bits. The MOV CRn instructions are used to manipulate the register bits.
- Writing a nonzero value to any of the upper 32 bits results in a general-protection exception, #GP(0).
1. The 80387 register stack . Each of the eight numeric
Registers in the 80387's register stack is 80 bits wide and is divided into
Fields corresponding to the NPX's extended real data type.
2. Numeric instructions address the data registers relative to the register on
The top of the stack.
3. At any point in time, this top-of-stack register is
Indicated by the TOP (stack TOP) field in the NPX status word.
4. Load or push
Operations decrement TOP by one and load a value into the new top register.
A store-and-pop operation stores the value from the current TOP register and
then increments TOP by one. Like 80386 stacks in memory, the 80387 register
stack grows down toward lower-addressed registers
Key takeaways
- The 80387 register stack . Each of the eight numeric
Registers in the 80387's register stack is 80 bits wide and is divided into
Fields corresponding to the NPX's extended real data type.
- At any point in time, this top-of-stack register is
Indicated by the TOP (stack TOP) field in the NPX status word.
1. The 80x87 is able to multiply, divide, add, subtract, find the sqrt and calculate transcendental functions and logarithms.
2.Data types include 16-, 32- and 64-bit signed integers; 18-digit BCD data; and 32-, 64- and 80-bit (extended precision) floating-point numbers.
The directives dw , dd and dq are used for declaring signed integer storage while dd , dq and dt are used for floating-point.
Key takeaways
- Data types include 16-, 32- and 64-bit signed integers; 18-digit BCD data; and 32-, 64- and 80-bit (extended precision) floating-point numbers.
Data Transfer Instructions
1. FLD (Load Real) Loads floating-point data to Stack Top (ST). Stack pointer is then decremented by 1.
2. Data can be retrieved from memory, or another stack position.
Note that ST is register 0 after initialization.
3. FST (Store Real), FSTP (Store Real and Pop)
Stores a copy of the top of the stack (and pop for FSTP) into memory or another coprocessor register.
5. Rounding occurs when the storage operation completes according to the control register.
Key takeaways
- FLD (Load Real) Loads floating-point data to Stack Top (ST). Stack pointer is then decremented by 1.
- FST (Store Real), FSTP (Store Real and Pop)
Stores a copy of the top of the stack (and pop for FSTP) into memory or another coprocessor register.
1. The 80387 and later FPUs provide eight transcendental (log and trigonometric) instructions to compute a partial tangent, partial arctangent, 2x-1, y * log2(x), and y *log2(x+1).
2. Using various algebraic identities, it is easy to compute most of the other common transcendental functions using these instructions.
Key takeaways
- The 80387 and later FPUs provide eight transcendental (log and trigonometric) instructions to compute a partial tangent, partial arctangent, 2x-1, y * log2(x), and y *log2(x+1).
1. The 80386 is designed to operate with either an 80287 or 80387 math coprocessor.
2. The ET bit of CR0 indicates which type of coprocessor is present. ET is set automatically by the 80386 after RESET according to the level detected on the ERROR# input.
3. If desired, ET may also be set or reset by loading CR0 with a MOV instruction. If ET is set, the 80386 uses the 32-bit protocol of the 80387; if reset, the 80386 uses the 16-bit protocol of the 80287.
4. The 80386 interprets the pattern 11011B in the first five bits of an instruction as an opcode intended for a coprocessor. Instructions thus marked are called ESCAPE or ESC instructions. The CPU performs the following functions upon encountering an ESC instruction before sending the instruction to the coprocessor:
4.1 Tests the emulation mode (EM) flag to determine whether coprocessor functions are being emulated by software.
4.2 Tests the TS flag to determine whether there has been a context change since the last ESC instruction.
4.3 For some ESC instructions, tests the ERROR# pin to determine whether the coprocessor detected an error in the previous ESC instruction.
5. The EM and MP flags of CR0 control how the processor reacts to coprocessor instructions.
6.The EM bit indicates whether coprocessor functions are to be emulated. If the processor finds EM set when executing an ESC instruction, it signals exception 7, giving the exception handler an opportunity to emulate the ESC instruction.
7. The MP (monitor coprocessor) bit indicates whether a coprocessor is actually attached. The MP flag controls the function of the WAIT instruction.
8. If, when executing a WAIT instruction, the CPU finds MP set, then it tests the TS flag; it does not otherwise test TS during a WAIT instruction. If it finds TS set under these conditions, the CPU signals exception 7.
9. The TS bit of CR0 helps to determine when the context of the coprocessor does not match that of the task being executed by the 80386 CPU. The 80386 sets TS each time it performs a task switch (whether triggered by software or by hardware interrupt).
10. If, when interpreting one of the ESC instructions, the CPU finds TS already set, it causes exception 7. The WAIT instruction also causes exception 7 if both TS and MP are set. Operating systems can use this exception to switch the context of the coprocessor to correspond to the current task.
Key takeaways
- The ET bit of CR0 indicates which type of coprocessor is present. ET is set automatically by the 80386 after RESET according to the level detected on the ERROR# input
- The 80386 interprets the pattern 11011B in the first five bits of an instruction as an opcode intended for a coprocessor.
- Tests the TS flag to determine whether there has been a context change since the last ESC instruction.
- The MP (monitor coprocessor) bit indicates whether a coprocessor is actually attached. The MP flag controls the function of the WAIT instruction
Part 2 Introduction to microcontrollers
1. A typical microcontroller will have the following components:
1.1 A central processing units that consists of simple (4 bit) or complex (28 or 32 bit) processors.
1.2 Particular bits are present in the microcontrollers that define the state (input or output) of every pin.
1.3 Serial ports are present to perform input and output operations. Other input or output interfaces are connected to these ports.
1.4 Other devices such as timers also may be connected to the microprocessor.
1.5 A clock is also present within the microcontroller. If no external clock is connected to it then, the above-mentioned clock is used to time the various operations.
1.6 It has a volatile memory (usually flash) to store the temporary data. Apart from it, a permanent memory is present as well.
1.7 It may contain an analogue to digital converter.
1.8 It contains mechanisms that support debugging of programs.
2. In some microcontrollers, Harvard architecture is used which makes use of separate buses for transfer of instruction.
3. This makes simultaneous transfer of data and instructions possible. When such architecture is used, the length of the instruction is different from the size of the general purpose registers present in the microcontroller.
4. Various programming languages are used for different microcontrollers. These are together termed as assembly language.
5. The programs are written in this language then, they are assembled (converted into binary code) and then, they are transferred onto the microcontroller where the code is stored in the read only memory.
6. Microcontrollers have revolutionized technology and have made possible the automation of many things that was earlier believed to be impossible.
Key takeaways
- A central processing unit that consists of simple (4 bit) or complex (28 or 32 bit) processors.
- A clock is also present within the microcontroller. If no external clock is connected to it then, the above-mentioned clock is used to time the various operations.
- The programs are written in this language then, they are assembled (converted into binary code) and then, they are transferred onto the microcontroller where the code is stored in the read only memory.
1. Typically an MCU uses on-chip embedded Flash memory in which to store and execute its program. Storing the program this way means the MCU having a shorter start-up period and executing code quickly.
2. The only practical limitation to using embedded memory is that the total available memory space is finite. Most Flash MCU devices available on the market have a maximum of 2 Mbytes of Program memory.
This may prove to be a limiting factor, depending on the application.
3. MPUs do not have memory constraints in the same way. They use external memory to provide program and data storage. The program is typically stored in non-volatile memory, such as NAND or serial Flash.
4. At start-up, this is loaded into an external DRAM and execution commences. This means the MPU will not be up and running as quickly as an MCU but the amount of DRAM and NVM you can connect to the processor is in the range of hundreds of Mbytes and even Gbytes for NAND.
5. Another difference is power. By embedding its own power supply, an MCU needs just one single voltage power rail. By comparison, an MPU requires several difference voltage rails for core, DDR etc. The developer needs to cater for this with additional power ICs / converters on- board.
Key takeaways
- Typically an MCU uses on-chip embedded Flash memory in which to store and execute its program. Storing the program this way means the MCU having a shorter start-up period and executing code quickly.
- At start-up, this is loaded into an external DRAM and execution commences. This means the MPU will not be up and running as quickly as an MCU but the amount of DRAM and NVM you can connect to the processor is in the range of hundreds of Mbytes and even Gbytes for NAND.
- Another difference is power. By embedding its own power supply, an MCU needs just one single voltage power rail.
6.9.1 Characteristics 8-bit microcontroller with an integrated CAN module
1. A 32 k flash program memory,
2. A 1536-byte RAM data memory,
3. A 256-byte EEPROM memory,
4. Twenty two I/O ports,
5. Five-channel 10-bit A/D converters,
6. Three timers/counters,
7. Three external interrupt pins,
8. High current (25-mA) sink/source,
9. Capture/compare/Pulse Width Modulation (PWM) module,
10. SPI/I2C module,
11. CAN 2.0A/B module,
12. Power-on reset and power-on timer,
13. Watchdog timer,
14. Priority level interrupts,
15. DC to 40-MHz clock input,
16. An 8 × 8 hardware multiplier,
17. Wide operating voltage (2.0–5.5 V),
18. Power saving sleep mode.
6.9.2 Characteristics if 16 bit characteristics
CPU16
1. 16 Bit Architecture
2. Control-Oriented Digital Signal Processing Capability
3. 16 bit Multiply and Accumulate (digital signal processing)
4. 1 Megabyte of Program Memory Space and 1 Megabyte of Data Memory Space
5. High Level Language Support
6.Fast Interrupt Response Time
7. Hardware Breakpoint Signal
8. Background Debugging Mode (BDM)
9. Fully Static Operation
10. Watchdog Timer, Clock Monitor and Bus Monitor
11. Parallel Ports Option on Address and Data Bus in Single Chip Mode
12. Two 8 bit Dual Function Input/Output Ports
13. One 7 bit Dual Function Output Port
14. Phase-Locked Loop (PLL) Clock System
15. Multichannel Communication Interface (MCCI)
17. Two channels of enhanced Serial Communication Interface (SCI) (UART)
18. One channel of Serial Peripheral Interface (SPI)
19. Configurable Timer Module Version 7 (CTM7)
20. One 16 bit modulus counters (MCSM)
21. One 16 Bit Free-Running Counter (FCSM)
22. Six single-action submodules (SASM)
Key takeaways
- Twenty two I/O ports,
- High current (25-mA) sink/source
- DC to 40-MHz clock input
- Multichannel Communication Interface (MCCI)
- Two channels of enhanced Serial Communication Interface (SCI) (UART)
- Watchdog Timer, Clock Monitor and Bus Monitor
- Phase-Locked Loop (PLL) Clock System
- One 16 bit modulus counters (MCSM)
6.10.1 Application of Microcontroller in Day to Day Life Devices:
1. Light sensing & controlling devices
2. Temperature sensing and controlling devices
3. Fire detection & safety devices
4. Industrial instrumentation devices
5. Process control devices
6.10.2 Application of Microcontroller in Industrial Control Devices:
1. Industrial instrumentation devices
2. Process control devices
6.10.3 Application of Microcontroller in Metering & Measurement Devices:
1. Volt Meter
2. Measuring revolving objects
3. Current meter
4. Hand-held metering systems
Key takeaways
- Light sensing & controlling devices
- Industrial instrumentation devices
- Industrial instrumentation devices
- Measuring revolving objects
References
1. A.Ray, K.Bhurchandi, ”Advanced Microprocessors and peripherals: Arch, Programming &
Interfacing”, Tata McGraw Hill,2004 ISBN 0-07-463841-6
2. Intel 80386 Programmer's Reference Manual 1986, Intel Corporation, Order no.: 231630-011,
December 1995.
3. James Turley, “Advanced 80386 Programming Techniques”, McGraw-Hill, ISBN: 10:
0078813425, 13: 978-0078813429.
