Unit-2

Addressing Modes

2.1 Introduction

Addressing modes is an approach in which the operands are given in an instruction for further operation in an assembly language code of most of the CPU with an instruction set.

2.1.1 Instruction syntax

An 8051 Instruction consists of an Opcode (short of Operation – Code) followed by Operand(s) of size Zero Byte, One Byte or Two Bytes.

The Op-Code part of the instruction contains the Mnemonic, which specifies the type of operation to be performed. All Mnemonics or the Opcode part of the instruction are of One Byte size.

2.1.2 Data types

C language supports 2 different type of data types:

1. Primary data types:

These are fundamental data types in C namely integer(int), floating point(float), character(char) and void.

2.     Derived data types:

Derived data types are nothing but primary datatypes but a little twisted or grouped together like array, structure, union and pointer.

Data type determines the type of data a variable will hold. If a variable x is declared as int. it means x can hold only integer values. Every variable which is used in the program must be declared as what data-type it is.

Integers:

Integers are used to store whole numbers.

Size and range of Integer type on 16-bit machine:

Char type

Character types are used to store characters value.

Size and range of Integer type on 16-bit machine

void type

void type means no value. This is usually used to specify the type of functions which returns nothing.

Key Takeaways:

Embedded C language is used commonly to program microcontrollers. So it is important to know everything about Embedded C. Keil C51 compiler uses some keywords for the ease of programming.

2.1.3 Subroutines

Subroutine is a group of instructions written separately from the main program to perform a function that occurs repeatedly in the main program. When  subroutine is called ,the current program is stopped and program counter PC is loaded with the memory location of the subroutine, running up to the RET instruction where we produce a return to the main program resumes.

It performs specific functions and do not operate on their own.

 They are always linked to a major program or other subroutines.

It can be called many times as necessary as it reduces the code the program to have the effect of code reuse.

It Allow the division of program blocks as perform the function of structure.

The Instructions to the Subroutine in 8051 Microcontroller is

ACALL LCALL RET RETI.

2.2 Addressing Modes

Immediate Addressing

In this addressing mode the data is provided as a part of instruction itself.

 That is the data immediately follows the instruction.

Eg. MOV A,#30H ;

 ADD A, #83 ;

Here # Symbol indicates that data is immediate.

 Register addressing.

In this addressing mode the register will hold the data.

 One of the eight general registers (R0 to R7) is used and specified as the operand.

Eg. MOV A,R0 ;

  ADD A,R6

R0 – R7 will be selected from the current selection of register bank. The default register bank will be bank 0.

 Direct addressing

There are two ways to access the internal memory that is by using direct address and indirect address.

In direct addressing mode we not only address the internal memory but SFRs also.

In direct addressing, an 8 bit internal data memory address is specified as part of the instruction and hence, it can specify the address only in the range of 00H to FFH.

In this addressing mode, data is obtained directly from the memory.

Eg. MOV A,60h

ADD A,30h

 Indirect addressing

The indirect addressing mode uses a register to hold the actual address that is used in data movement.

Registers R0 and R1 and DPTR are the only registers that can be used as data pointers.

Indirect addressing cannot be used to refer to SFR registers.

Both R0 and R1 can hold 8 bit address and DPTR can hold 16 bit address.

Eg. MOV A,@R0

      ADD A,@R1

      MOVX A,@DPTR

Indexed addressing

In indexed addressing, either the program counter (PC), or the data pointer (DTPR)—is used to hold the base address, and A is used to hold the offset address.

Adding the value of the base address to the value of the offset address forms the effective address.

Effective address = Base address + value of offset address.

 Indexed addressing is used with JMP or MOVC instructions.

Look up tables are easily implemented with the help of index addressing.

Eg. MOVC A, @A+DPTR // copies the contents of memory location pointed by the sum of the accumulator A and the DPTR into accumulator A.

MOVC A, @A+PC // copies the contents of memory location pointed by the sum of the accumulator A and the program counter into accumulator A.

Relative Addressing

Relative addressing is used only with conditional jump instructions. The relative address, (offset), is an 8 bit signed number, which is automatically added to the PC to make the address of the next instruction.

The 8 bit signed offset value gives an address range of +127 to —128 locations.

The jump destination is usually specified using a label and the assembler calculates the jump offset accordingly.

The advantage of relative addressing is that the program code is easy to relocate and the address is relative to position in the memory.

Eg. SJMP LOOP1 JC BACK

 Absolute addressing

 Absolute addressing is used only by the AJMP (Absolute Jump) and ACALL (Absolute Call) instructions.

These are 2 bytes instructions.

The absolute addressing mode specifies the lowest 11 bit of the memory address as part of the instruction.

The upper 5 bit of the destination address are the upper 5 bit of the current program counter. Hence, absolute addressing allows branching only within the current 2 Kbyte page of the program memory.

Eg. AJMP LOOP1 ACALL LOOP2

 Long Addressing

The long addressing mode is used with the instructions LJMP and LCALL. These are 3 byte instructions. The address specifies a full 16 bit destination address so that a jump or a call can be made to a location within a 64 Kbyte code memory space.

Eg. LJMP FINISH LCALL DELAY

Bit Inherent Addressing

In this addressing, the address of the flag which contains the operand, is implied in the opcode of the instruction. Eg. CLR C ; Clears the carry flag to 0

 Bit Direct Addressing

In this addressing mode the direct address of the bit is specified in the instruction. The RAM space 20H to 2FH and most of the special function registers are bit addressable. Bit address values are between 00H to 7FH.

Eg. CLR 07h ; Clears the bit 7 of 20h RAM space

        SETB 07H ; Sets the bit 7 of 20H RAM space.

2.3 Instruction Set

2.3.1 Instruction timings

2.3.2 Data transfer instructions

In this group, the instructions perform data transfer operations of the following types.

a. Move the contents of a register Rn to A

1. MOV A,R2
2. MOV A,R7

b. Move the contents of a register A to Rn

i. MOV R4,A

ii. MOV R1,A

c. Move an immediate 8 bit data to register A or to Rn or to a memory location(direct or indirect)

 i. MOV A, #45H

ii. MOV R6, #51H i

            iii.MOV 30H, #44H

           iv. MOV @R0, #0E8H

           v. MOV DPTR, #0F5A2H

           vi. MOV DPTR, #5467H

d. Move the contents of a memory location to A or A to a memory location using direct and indirect addressing

 i. MOV A, 65H

 ii. MOV A, @R0

iii.MOV 45H, A

iv. MOV @R1, A

e. Move the contents of a memory location to Rn or Rn to a memory location using direct addressing

 i. MOV R3, 65H

 ii. MOV 45H, R2

 f. Move the contents of memory location to another memory location using direct and indirect addressing

 i. MOV 47H, 65H

 ii. MOV 45H, @R0

 g. Move the contents of an external memory to A or A to an external memory

 i. MOVX A,@R1

 ii. MOVX @R0,A

 iii. MOVX A,@DPTR iv. MOVX@DPTR,A

 h. Move the contents of program memory to A

 i. MOVC A, @A+PC

 ii. MOVC A, @A+DPTR

Program

Write 8085 Assembly language program to swap two 8-bit number stored at location 8000H and 8001H using direct addressing mode.

MOV B,M ; Load the first number to B

INX H        ; Point to the next number

MOV A,M; Load the second number into A

MOV M,B; Store first number to second position

DCX H    ; Point to previous location

MOV M,A; Store second number to first position.

HLT.

2.3.3 Arithmetic Instructions

The 8051 can perform addition, subtraction. Multiplication and division operations on 8 bit numbers.

Addition

In this group, we have instructions to

i. Add the contents of A with immediate data with or without carry.

i. ADD A, #45H

ii. ADDC A, #OB4H

ii. Add the contents of A with register Rn with or without carry.

1. ADD A, R5
2.  ADDC A, R2
3.  Add the contents of A with contents of memory with or without carry using direct and indirect addressing
   1. ADD A, 51H
   2.  ADDC A, 75H
   3.  ADD A, @R1
   4.  ADDC A, @R0 CY AC and OV flags will be affected by this operation.

Subtraction

In this group, we have instructions to

 i. Subtract the contents of A with immediate data with or without carry.

i. SUBB A, #45H

 ii. SUBB A, #OB4H

ii. Subtract the contents of A with register Rn with or without carry.

1. SUBB A, R5
2.  SUBB A, R2
3.  Subtract the contents of A with contents of memory with or without carry using direct and indirect addressing
   1. SUBB A, 51H
   2. SUBB A, 75H
   3.  SUBB A, @R1
   4.  SUBB A, @R0 CY AC and OV flags will be affected by this operation.

Multiplication

MUL AB.

This instruction multiplies two 8 bit unsigned numbers which are stored in A and B register. After multiplication the lower byte of the result will be stored in accumulator and higher byte of result will be stored in B register.

Eg. MOV A,#45H ;[A]=45H

MOV B,#0F5H ;[B]=F5H

MUL AB ;[A] x [B] = 45 x F5 = 4209 ;[A]=09H, [B]=42H

Division

DIV AB.

This instruction divides the 8 bit unsigned number which is stored in A by the 8 bit unsigned number which is stored in B register. After division the result will be stored in accumulator and remainder will be stored in B register.

Eg. MOV A,#45H ;[A]=0E8H

MOV B,#0F5H ;[B]=1BH

DIV AB ;[A] / [B] = E8 /1B = 08 H with remainder 10H ;[A] = 08H, [B]=10H

DAA (Decimal Adjust After Addition).

When two BCD numbers are added, the answer is a non-BCD number. To get the result in BCD, we use DA A instruction after the addition. DA A works as follows. 

• If lower nibble is greater than 9 or auxiliary carry is 1, 6 is added to lower nibble
• If upper nibble is greater than 9 or carry is 1, 6 is added to upper nibble.

Eg 1: MOV A,#23H

MOV R1,#55H

ADD A,R1 // [A]=78

DA A // [A]=78 no changes in the accumulator after DAA

Eg 2: MOV A,#53H

 MOV R1,#58H ADD A,R1 // [A]=ABh

DA A // [A]=11, C=1 .

ANSWER IS 111. Accumulator data is changed after DAA

2.3.4  Logical Instructions

LOGICAL AND

a. ANL C,BIT(BIT ADDRESS) ;

Logically and carry content of Bit address and store the result in carry.

 b. ANL C, /BIT;

Logically and carry and complement content of bit address and store the result in carry.

Examples:

ANL A, #n ;

AND each bit of A with the same bit of immediate number n, Result is placed in A.

ANL A, add ;

AND each bit of A with the same bit of the direct RAM address, result is placed in A

ANL A, Rr ;

AND each bit of A with the same bit of register Rr, result is placed In A.

ANL A, @Rr ;

AND each bit of A with the same bit of the contents of RAM Address in Rp, result is placed in A.

ANL add,A ;

AND each bit of A with the same bit of the direct RAM address, result is placed in direct RAM add.

ANL add, #n ;

AND each bit of A with the same bit of the immediate number, result is placed in direct RAM add.

Find the result of the following code:

MOV A,#57H      ; A = 57H

ANL A,#0F0H     ; A = A and F0 H

57 H =   0101 0111

F0 H =   1111 0000

               0101 0000 = 50H

A = 50H

 LOGICAL OR

 a. ORL C,BIT(BIT ADDRESS) ;

 Logically OR carry the content of bit address and store the result in carry.

 b. ORL C, /BIT;

Logically OR carry and Complement the content of bit address and the store the result in carry.

Examples

ORL A, #n ;

OR each bit of A with the same bit of immediate number n, Result is placed in A.

ORL A, add ;

OR each bit of A with the same bit of the direct RAM address, result is placed in A

ORL A, Rr ;

OR each bit of A with the same bit of register Rr, result is placed in A.

ORL A, @Rr ;

OR each bit of A with the same bit of the contents of RAM Address in Rp, result is placed in A.

ORL add,A ;

OR each bit of A with the same bit of the direct RAM address, result is placed in direct RAM add.

ORL add, #n ;

OR each bit of A with the same bit of the immediate number, result is placed in direct RAM add.

Find the result of the following code:

MOV A,#15H     ;  A =15H

ORL A,#70H       ; A=A OR 70H

Solution:

15 H     0001  0101

70H      0111 0000

              0 111  0101 = 75H

A= 75H

LOGICAL XOR

a. XRL C,BIT(BIT ADDRESS) ;

 Logically XOR carry the content of bit address and store the result in carry.

 b. XRL C, /BIT;

Logically XOR carry and Complement the content of bit address and the store the result in carry.

Examples

XRL A, #n ;

XOR each bit of A with the same bit of immediate number n, Result is placed in A.

XRL A, add

XOR each bit of A with the same bit of the direct RAM address, result is placed in A

XRL A, Rr ;

XOR each bit of A with the same bit of register Rr, result is placed in A.

XRL A, @Rr ;

XOR each bit of A with the same bit of the contents of RAM Address in Rp, result is placed in A.

XRL add,A ;

XOR each bit of A with the same bit of the direct RAM address, result is placed in direct RAM add.

XRL add, #n ;

XOR each bit of A with the same bit of the immediate number, result is placed in direct RAM add.

Find the result of the following code:

MOV A,#55H  ; A = 55H

XRL A,#F0H    ; A= A OR F0H

Solution

55 H =    0101 0101

F0 H =    1111 0000

                 1010 0101 = A5H

A = A5H

CLR bit

a. CLR bit ; Content of Bit Address specified will be cleared.

 b. CLR C ; Content of Carry will be cleared.

 CPL bit

 a. CPL bit ; Content of Bit address specified will be complemented.

 b. CPL C ; Content of carry will be complemented.

2.3.5 Branch Instructions

Jump and Call Program Range

There are 3 types of jump instructions.

They are:-

 1. Relative Jump

2. Short Absolute Jump

3. Long Absolute Jump

Relative Jump that replaces the PC (program counter) content with a new address that is greater than (the address following the jump instruction by 127 or less) or less than (the address following the jump

Fig1. Jump instruction

The advantages of the relative jump are as follows :-

1. Only 1 byte of jump address needs to be specified in the 2's complement form, ie. For jumping ahead, the range is 0 to 127 and for jumping back, the range is -1 to -128.

2. Specifying only one byte reduces the size of the instruction and speeds up program execution. 3. The program with relative jumps can be relocated without reassembling to generate absolute jump addresses.

Disadvantages of the absolute jump: -

1. Short jump range (-128 to 127 from the instruction following the jump instruction)

Instructions that use Relative Jump

 SJMP ; this is unconditional jump

The remaining relative jumps are conditional jumps

JC <relative address>

JNC <relative address>

JB bit <relative address>

 JNB bit <relative address>

 JBC bit <relative address>

CJNE<destination byte> <source byte> <relative address>

DJNZ <byte><relative address

JZ<relative address>

JNZ<relative address>

Short Absolute Jump In this case only 11bits of the absolute jump address are needed. The absolute jump address is calculated in the following manner.

In 8051, 64 kbyte of program memory space is divided into 32 pages of 2 kbyte each. The hexadecimal addresses of the pages are given as follows:-

The upper 5bits of the program counter (PC) hold the page number and the lower 11bits of the PC hold the address within that page. Thus, an absolute address is formed by taking page numbers of the instruction (from the program counter) following the jump and attaching the specified 11bits to it to form the 16-bit address.

Advantage: The instruction length becomes 2 bytes.

Example of short absolute jump: - ACALL , AJMP

Long Absolute Jump/Call

Applications that need to access the entire program memory from 0000H to FFFFH use long absolute jump. Since the absolute address has to be specified in the op-code, the instruction length is 3 bytes (except for JMP @ A+DPTR). This jump is not re-locatable.

Example: - LCALL

LJMP

JMP @A+DPTR

Another classification of jump instructions is

1. Unconditional Jump

2. Conditional Jump

1. The unconditional jump is a jump in which control is transferred unconditionally to the target location.

a. LJMP (long jump). This is a 3-byte instruction. First byte is the op-code and second and third bytes represent the 16-bit target address which is any memory location from 0000 to FFFFH

eg: LJMP 3000H

b. AJMP: this causes unconditional branch to the indicated address, by loading the 11 bit address to 0 -10 bits of the program counter. The destination must be therefore within the same 2K blocks.

c. SJMP (short jump). This is a 2-byte instruction. First byte is the op-code and second byte is the relative target address, 00 to FFH (forward +127 and backward -128 bytes from the current PC value). To calculate the target address of a short jump, the second byte is added to the PC value which is address of the instruction immediately below the jump.

2. Conditional Jump instructions.

JBC Jump if bit ＝ 1 and clear bit

JNB Jump if bit ＝ 0

JB Jump if bit ＝ 1

JNC Jump if CY ＝ 0

JC Jump if CY ＝ 1

CJNE reg,#data Jump if byte ≠ #data

CJNE A,byte Jump if A ≠ byte

DJNZ Decrement and Jump if A ≠ 0

JNZ Jump if A ≠ 0

JZ Jump if A ＝ 0

All conditional jumps are short jumps.

Bit level jump instructions: Bit level JUMP instructions will check the conditions of the bit and if condition is true, it jumps to the address specified in the instruction. All the bit jumps are relative jumps.

JB bit, rel ; jump if the direct bit is set to the relative address specified.

 JNB bit, rel ; jump if the direct bit is clear to the relative address specified.

JBC bit, rel ; jump if the direct bit is set to the relative address specified and then clear the bit.

Assembly Language:

MOV 24H,10H; copy item from 10H to 24H

CPL 24.2 ; complement bit b2

MOVC,24.5; Copy b5 to C

MOV 24.4,C; Move C to b4

MOVC 24.0; Make copy of b0 to C

ORLC,/1; OR C and complement of b1

SETB24.6; Set bit b6

CLR 24.3; Reset bit b3

MOV 30H,24H; Store the result at 30H

HALT: SJMP HALT

Key Takeaways:

There are two kinds of branch instructions:

Unconditional jump instructions: upon their execution a jump to a new location from where the program continues execution is executed.

Conditional jump instructions: a jump to a new program location is executed only if a specified condition is met. Otherwise, the program normally proceeds with the next instruction.

2.3.6 Subroutine Instructions

Subroutines are handled by CALL and RET instructions There are two types of CALL instructions

1. LCALL address(16 bit) This is long call instruction which unconditionally calls the subroutine located at the indicated 16 bit address. This is a 3 byte instruction. The LCALL instruction works as follows.

 a. During execution of LCALL, [PC] = [PC]+3; (if address where LCALL resides is say, 0x3254; during execution of this instruction [PC] = 3254h + 3h = 3257h

b. [SP]=[SP]+1; (if SP contains default value 07, then SP increments and [SP]=08

 c. [[SP]] = [PC7-0]; (lower byte of PC content ie., 57 will be stored in memory location 08.

d. [SP]=[SP]+1; (SP increments again and [SP]=09)

e. [[SP]] = [PC15-8]; (higher byte of PC content ie., 32 will be stored in memory location 09. With these the address (0x3254) which was in PC is stored in stack.

f. [PC]= address (16 bit);the new address of subroutine is loaded to PC. No flags are affected.

 2. ACALL address(11 bit) This is absolute call instruction which unconditionally calls the subroutine located at the indicated 11 bit address. This is a 2 byte instruction.

 The ACALL instruction works as follows.

During execution of SCALL, [PC] = [PC]+2; if address where LCALL resides is say, 0x8549;

During execution of this instruction [PC] = 8549h + 2h = 854Bh

[SP]=[SP]+1; (if SP contains default value 07, then SP increments and    

[SP]=08

[[SP]] = [PC7-0]; (lower byte of PC content ie., 4B will be stored in   memory location 08.

[SP]=[SP]+1; (SP increments again and [SP]=09)

 [[SP]] = [PC15-8]; (higher byte of PC content ie., 85 will be stored in memory location 09. With these the address (0x854B) which was in PC is stored in stack.

[PC10-0]= address (11 bit); the new address of subroutine is loaded to PC. No flags are affected.

 RET instruction

 RET instruction pops top two contents from the stack and load it to PC.

 [PC15-8] = [[SP]] ;content of current top of the stack will be moved to higher byte of PC.

 [SP]=[SP]-1; (SP decrements)

 [PC7-0] = [[SP]] ;content of bottom of the stack will be moved to lower byte of PC. j. [SP]=[SP]-1; (SP decrements again)

2.3.7 Bit Manipulation Instructions

CLR bit. Zero the specified bit.

SETB bit. Putting a specified bit.

CPL bit. Complement the bit indicated.

Bit_destino MOV, bit_procedencia. Transfer or move a bit.

ANL C, bit_procedencia. AND (Y) between the carry logic and the bit indicated.

ORL C, bit_procedencia. OR (O) and carry logic between the specified bit.

References:

1. The 8051 Microcontroller and Embedded Systems using Assembly and C by Muhammad Ali Mazidi.
2. The 8051 Microcontroller by I. Scott Mackenzie, Raphael C.W Phan