MICRO
Unit-7Motivation for MSP430 Microcontrollers Q1) Explain the on-chip peripherals?Memory: These devices have flash memory, up to 512KB and RAM up to 66KB. Digital I/O Ports: MSP430x5xx devices may have up to 12 digital I/O ports implemented, P1 to P11 and PJ. Most ports have eight I/O pins, however some ports may contain less. Each I/O pin is individually configurable for input or output direction, and each I/O line can be individually read or written to. All ports have individually configurable pullup or pulldown resistors. Ports P1 and P2 always have interrupt capability. Port pairs P1/P2, P3/P4, P5/P6, P7/P8, etc. are associated with the names PA, PB, PC, PD, etc., respectively. The digital I/O features include: • Independently programmable individual I/Os • Any combination of input or output • Individually configurable P1 and P2 interrupts • Independent input and output data registers • Individually configurable pullup or pulldown resistors Q2) Write a short note on on-chip solutions?Single-chip solution in place of multi-chip • Interfaces to a variety of current sensors • Support for various wired/wireless protocols • Metrology engine in Hardware/Software
Figure. On-chip solutions Q3) Explain the arithmetic instructions of MSP430?ADC * ADC[.W] Add carry to destination * ADC.B Add carry to destination Syntax ADC dst or ADC.W dst ADC.B dst Operation dst + C → dst Emulation ADDC #0,dst ADDC.B #0,dst Description The carry bit (C) is added to the destination operand. The previous contents of the destination are lostExample The 8-bit counter pointed to by R13 is added to a 16-bit counter pointed to by R12. ADD.B @R13,0(R12) ; Add LSDs ADC.B 1(R12) ; Add carry to MSD2. ADD ADD[.W] Add source word to destination word ADD.B Add source byte to destination byte Syntax ADD src,dst or ADD.W src,dst ADD.B src,dst Operation src + dst → dstDescription The source operand is added to the destination operand. The previous content of the destination is lost.3. ADDC ADDC[.W] Add source word and carry to destination word ADDC.B Add source byte and carry to destination byte Syntax ADDC src,dst or ADDC.W src,dst ADDC.B src,dst Operation src + dst + C → dst Description:The source operand and the carry bit C are added to the destination operand. The previous content of the destination is lost.2 SBC * SBC[.W] Subtract borrow (.NOT. carry) from destination * SBC.B Subtract borrow (.NOT. carry) from destination Syntax SBC dst or SBC.W dst SBC.B dst Operation dst + 0FFFFh + C → dst dst + 0FFh + C → dst Emulation SUBC #0,dst SUBC.B #0,dst Description The carry bit (C) is added to the destination operand minus one. The previous contents of the destination are lost.Example The 16-bit counter pointed to by R13 is subtracted from a 32-bit counter pointed to by R12. SUB @R13,0(R12) ; Subtract LSDs SBC 2(R12) ; Subtract carry from MSDSUB SUB[.W] Subtract source word from destination word SUB.B Subtract source byte from destination byte Syntax SUB src,dst or SUB.W src,dst SUB.B src,dst Operation (.not.src) + 1 + dst → dst or dst – src → dst Description The source operand is subtracted from the destination operand. This is made by adding the 1s complement of the source + 1 to the destination. The source operand is not affected, the result is written to the destination operand.Example A 16-bit constant 7654h is subtracted from RAM word EDE. SUB #7654h,&EDE ; Subtract 7654h from EDESUBC SUBC[.W] Subtract source word with carry from destination word SUBC.B Subtract source byte with carry from destination byte Syntax SUBC src,dst or SUBC.W src,dst SUBC.B src,dst Operation (.not.src) + C + dst → dst or dst – (src – 1) + C → dst Description The source operand is subtracted from the destination operand. This is done by adding the 1s complement of the source + carry to the destination. The source operand is not affected, the result is written to the destination operand. Used for 32, 48, and 64-bit operands.Example A 16-bit constant 7654h is subtracted from R5 with the carry from the previous instruction. R5.19:16 = 0 SUBC.W #7654h,R5 ; Subtract 7654h + C from R5 Q4) Write a short note on Branch Instructions?Branch Instructions * BR, Branch to destination in lower 64K address space BRANCH Syntax BR dst Operation dst → PC Emulation MOV dst,PC Description An unconditional branch is taken to an address anywhere in the lower 64K address space. All source addressing modes can be used. The branch instruction is a word instruction.Example BR @R5+ ; Branch to the address contained in the word pointed ; to by R5 and increment pointer in R5 afterwards. ; The next time-S/W flow uses R5 pointer-it can ; alter program execution due to access to ; next address in a table pointed to by R5 ; Core instruction MOV @R5,PC ; Indirect, indirect R5 with autoincrement CALL CALL Call a subroutine in lower 64 K Syntax CALL dst Operation dst → tmp 16-bit dst is evaluated and stored SP – 2 → SP PC → @SP updated PC with return address to TOS tmp → PC saved 16-bit dst to PC Description A subroutine call is made from an address in the lower 64 K to a subroutine address in the lower 64 K. All seven source addressing modes can be used. The call instruction is a word instruction. The return is made with the RET instruction.JC, JHS JC Jump if carryJHS Jump if higher or same (unsigned) Syntax JC label JHS label Operation If C = 1: PC + (2 × Offset) → PC If C = 0: execute the following instruction Description The carry bit C in the SR is tested. If it is set, the signed 10-bit word offset contained in the instruction is multiplied by two, sign extended, and added to the 20-bit PC. This means a jump in the range –511 to +512 words relative to the PC in the full memory range. If C is reset, the instruction after the jump is executed. JC is used for the test of the carry bit C. JHS is used for the comparison of unsigned numbers.JEQ, JZ JEQ Jump if equal JZ Jump if zero Syntax JEQ label JZ label Operation If Z = 1: PC + (2 × Offset) → PC If Z = 0: execute following instruction Description The zero bit Z in the SR is tested. If it is set, the signed 10-bit word offset contained in the instruction is multiplied by two, sign extended, and added to the 20-bit PC. This means a jump in the range –511 to +512 words relative to the PC in the full memory range. If Z is reset, the instruction after the jump is executed. JZ is used for the test of the zero bit Z. JEQ is used for the comparison of operands.JGE Jump if greater or equal (signed)SyntaxJGE label OperationIf (N .xor. V) = 0: PC + (2 × Offset) → PC If (N .xor. V) = 1: execute following instruction Description The negative bit N and the overflow bit V in the SR are tested. If both bits are set or both are reset, the signed 10-bit word offset contained in the instruction is multiplied by two, sign extended, and added to the 20-bit PC. This means a jump in the range -511 to +512 words relative to the PC in full Memory range. If only one bit is set, the instruction after the jump is executed. JGE is used for the comparison of signed operands: also for incorrect results due to overflow, the decision made by the JGE instruction is correct. Note that JGE emulates the non-implemented JP (jump if positive) instruction if used after the instructions AND, BIT, RRA, SXTX, and TST. These instructions clear the V bit.JL JL Jump if less (signed)Syntax JL label Operation If (N .xor. V) = 1: PC + (2 × Offset) → PC If (N .xor. V) = 0: execute following instruction Description The negative bit N and the overflow bit V in the SR are tested. If only one is set, the signed 10-bit word offset contained in the instruction is multiplied by two, sign extended, and added to the 20-bit PC. This means a jump in the range –511 to +512 words relative to the PC in full memory range. If both bits N and V are set or both are reset, the instruction after the jump is executed. JL is used for the comparison of signed operands: also for incorrect results due to overflow, the decision made by the JL instruction is correct.JMP JMP Jump unconditionally Syntax JMP label Operation PC + (2 × Offset) → PC Description The signed 10-bit word offset contained in the instruction is multiplied by two, sign extended, and added to the 20-bit PC. This means an unconditional jump in the range –511 to +512 words relative to the PC in the full memory. The JMP instruction may be used as a BR or BRA instruction within its limited range relative to the PC.JNJN Jump if negative Syntax JN label Operation If N = 1: PC + (2 × Offset) → PCIf N = 0: execute following instruction Description The negative bit N in the SR is tested. If it is set, the signed 10-bit word offset contained in the instruction is multiplied by two, sign extended, and added to the 20-bit program PC. This means a jump in the range -511 to +512 words relative to the PC in the full memory range. If N is reset, the instruction after the jump is executed.JNC, JLO JNC Jump if no carry JLO Jump if lower (unsigned) Syntax JNC label JLO labelOperation If C = 0: PC + (2 × Offset) → PC If C = 1: execute following instruction Description The carry bit C in the SR is tested. If it is reset, the signed 10-bit word offset contained in the instruction is multiplied by two, sign extended, and added to the 20-bit PC. This means a jump in the range –511 to +512 words relative to the PC in the full memory range. If C is set, the instruction after the jump is executed. JNC is used for the test of the carry bit C. JLO is used for the comparison of unsigned numbers.JNZ, JNE JNZ Jump if not zero JNE Jump if not equal Syntax JNZ label JNE label Operation If Z = 0: PC + (2 × Offset) → PC If Z = 1: execute following instruction Description The zero bit Z in the SR is tested. If it is reset, the signed 10-bit word offset contained in the instruction is multiplied by two, sign extended, and added to the 20-bit PC. This means a jump in the range –511 to +512 words relative to the PC in the full memory range. If Z is set, the instruction after the jump is executed. JNZ is used for the test of the zero bit Z. JNE is used for the comparison of operands.Q5) Write a short note on Rotate Instructions?RLC * RLC[.W] Rotate left through carry * RLC.B Rotate left through carry Syntax RLC dst or RLC.W dst RLC.B dst Operation C ← MSB ← MSB-1 .... LSB+1 ← LSB ← CEmulation ADDC dst,dst Description The destination operand is shifted left one position as shown in Figure. The carry bit (C) is shifted into the LSB, and the MSB is shifted into the carry bit (C).
Figure .Carry left Shift RRA RRA[.W] Rotate right arithmetically destination word RRA.B Rotate right arithmetically destination byte Syntax RRA.B dst or RRA.W dst Operation MSB → MSB → MSB–1 → ... LSB+1 → LSB → C Description The destination operand is shifted right arithmetically by one bit position as shown in Figure. The MSB retains its value (sign). RRA operates equal to a signed division by 2. The MSB is retained and shifted into the MSB–1. The LSB+1 is shifted into the LSB. The previous LSB is shifted into the carry bit C.
Figure . Rotate Right Arithmetically RRA.B and RRA.WRRC RRC[.W] Rotate right through carry destination word RRC.B Rotate right through carry destination byte Syntax RRC dst or RRC.W dst RRC.B dst Operation C → MSB → MSB–1 → ... LSB+1 → LSB → C Description The destination operand is shifted right by one bit position as shown in Figure. The carry bit C is shifted into the MSB and the LSB is shifted into the carry bit C.SETC ; Prepare carry for MSB RRC EDE ; EDE = EDE >> 1 + 8000h
Figure . Rotate Right Through Carry RRC.B and RRC.W Q6) Write a short note on the clock system of MSP430?The clock system on the MSP430 is designed to be flexible and low power. The MSP has three clock sources for the clocking system, and three clock lines that chip systems can choose between. The clock sources are used as the basis for the clock lines, and this allows for a mix of slow and fast clocks to be used around the system. The three clock sources are:Low Frequency Crystal Clock (LFXTCLK) – this signal is meant to come from a watch crystal external to the MSP itself. The crystal connects to the XIN and XOUT pins, and the intended oscillation is 32kHz. This is the source of the Auxiliary Clock line (ACLK). The primary control of this source is that it can be turned off with the OSCOFF option in the Status Register. The source also has a high-speed mode for faster crystals. Crystal 2 Clock (XT2CLK) – this signal is the second external clock source, and it is connected to the XT2IN and XT2OUT pins. In general, this signal is meant to be the high-speed clock source. Digitally Controlled Oscillator Clock (DCOCLK) – this is the only internally generated clock input, and it is the default clock source for the master clock upon reset. By default this clock runs at about 900kHZ, but the RSELx, MODx, and DCOx bits allow this to be divided down or even blended to achieve a lower clock frequency on average. The three clock lines are:Master Clock (MCLK) – This clock is the source for the MSP CPU core; this clock must be working properly for the processor to execute instructions. This clock has the most selection for its source. The source is selected with the SELMx bits of the Basic Clock System Control Register 2 (BCSCTL2). The divider is controlled with the DIVMx of the BCSCTL2. Finally, the CPU can be turned off with the CPUOFF bit of the Status Register (SR), but to recover from this state an interrupt must occur. Submaster Clock (SMCLK) - This clock is the source for most peripherals, and its source can either be the DCO or Crystal 2. The source clock is controlled with the SELS and SCG bits of the BCSCTL2 and SR. The divider is controlled by the DIVSx bits of the BCSCTL2. Auxiliary Clock (ACLK) - this clock line’s source is always LFXTCLK. It is an option for slower subsystems to use to conserve power. This clock can be divided as controlled by the DIVAx bits of the Basic Clock System Control Register 1 (BCSCTL1). The MSP clock system has dividers at the beginning of its clocks, and at most peripheral destinations. Q7) Write a short note on memory subsystem?The main blocks are linked by the memory address bus (MAB) and memory data bus (MDB).-The MSP430 has flash memory of 2KB, and 128 bytes of RAM.-Six blocks are shown for peripheral functions include1. Port P1: 8 input/output pins with interrupt capability,2. Port P2: 2 input/output pins with interrupt capability,3. 16-Bit Timer_A with Two Capture/Compare Registers,4. A watchdog timer.5. The universal serial interface (USI)6. 16-Bit sigma–delta analog-to-digital converter (SD16_A)-The brownout protection comes into action if the supply voltage drops to a dangerous level.-There are ground and power supply connections. Ground is labeled VSS and is taken to define 0V. The supply connection is VCC.
Figure . Memory in MSP430 Q8) Explain Code Composer Studio?The information for a project is stored in a single project file (*.pjt).
Q9) Explain with an example the application of MSP430?Flashing the LED CCS includes C code template files that allow flashing the LED in no time. To get started: 1. Start Code Composer Studio by clicking Start → All Programs → Texas Instruments → Code Composer Studio → Code Composer Studio. 2. Create a new Project by clicking File → New → CCS Project. 3. Enter a project name. 4. Set the Device Family to MSP430 and select the Device Variant to use. 5. Select "Blink The LED" in the "Project templates and example" section. 6. Click Finish.7. To compile the code and download the application to the target device, click Run → Debug (F11).8.To start the application, click Run → Resume (F8) or click the Play button on the toolbar Q10) Write a short note on interrupts?There are in general three types of interrupts: • System Reset • Non-maskable Interrupts (NMI) • Maskable InterruptsSystem Reset interrupts simply occur because of any of the conditions that resets the microcontroller (a reset switch, startup, etc ). These reset the microcontroller completely and are considered the most critical of interrupts. The second type of interrupts is the non-maskable ones. Mask ability refers to the fact that these interrupts cannot be disabled collectively and must be disabled and enabled individually. These are interrupts in the category where the error can possible be handled without a reset.. These interrupts occur for the following reasons: • An edge on the RST/NMI pin when configured in NMI mode • An oscillator fault has occurred because of failure • An access violation to the flash memory occurred.To use the interrupt, we need the following procedure: 1. Setup the interrupt you wish and its conditions 2. Enable the interrupt/s 3. Write the interrupt handlerWhen the interrupt happens, the CPU stops executing anything it is currently executing. It then stores information about what it was executing before the interrupt so it can return to it when the interrupt handler is done .The interrupt handler is then called and the code in it is executed. Whenever the interrupt ends, the system goes back to its original condition executing the original code.Key Take Aways:When an interrupt occurs, the CPU of the MSP430 saves its current state and goes to handle the interrupt handler if one exists.
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The following procedure to create new projects, one at a time. When multiple projects are created, each project’s filename must be unique . Step 1: From the Project menu, choose New. The Project Creation wizard window displays. Figure . Project Creation Step 2: In the Project Name field, type the name for the project. Each project you create must have a unique name. Step 3: In the Location field, specify directory to store the project file. Type the full path in the Location field or click the Browse button and use the Choose Directory dialog box. Step 4: In the Project Type field, select a Project Type from the drop-down list. Choose either Executable (.out) or Library (lib). Executable indicates that the project generates an executable file. Library indicates that you are building an object library. Step 5: In the Target field, select the Target Family that identifies the CPU. This information is necessary when tools are installed for multiple targets. Step 6: Click Finish. After creating a new project file, add the filenames of the source code, object libraries, and linker command file to the project list.
Figure 2. Code Composer Studio Project Management and Editing Tools
Adding Files to a Project Step 1: Select Project→Add Files to Project, or or right-click on the project’s filename in the Project View window and select Add Files. The Add Files to Project dialog box displays. Figure 3. Adding files
Step 2: In the Add Files to Project dialog box, specify a file to add. If the file does not exist in the current directory, browse to the correct location. Use the Files of type drop-down list to set the type of files that appear in the File name field. Step 3: Click Open to add the specified file to your project. The Project View is automatically updated when a file is added to the current project.
Figure . Selection Building and Running the Program To build and run a program, follow these steps Step 1: Choose Project→Rebuild All or click the (Rebuild All) toolbar button. The CCS IDE recompiles, reassembles, and relinks all the files in your project. Messages about this process are shown in a frame at the bottom of the window. Step 2: By default, the .out file is built into a debug directory located under your current project folder. To change this location, select a different one from the CCS toolbar.
Step 3: Choose File→Load Program. Select the program you just rebuilt, and click Open. The CCS IDE loads the program onto the target DSP and opens a Dis-Assembly window that shows the disassembled instructions that make up the program. (Notice that the CCS IDE also automatically opens a tabbed area at the bottom of the window to show the output that the program sends to stdout.) Step 4: Choose View→Mixed Source/ASM. This allows you to simultaneously view your c source and the resulting assembly code . Step 5: Click on an assembly instruction in the mixed-mode window. (Click on the actual instruction, not the address of the instruction or the fields passed to the instruction.) Press the F1 key. The CCS IDE searches for help on that instruction. This is a good way to get help on an unfamiliar assembly instruction. Building and Running the Program Code Composer Studio Project Management and Editing Tools . Step 6: Choose Debug→Go Main to begin execution from the main function. The execution halts at main and is identified by . Step 7: Choose Debug→Run or click the (Run) toolbar button to run the program. Step 8: Choose Debug→Halt to quit running the program.
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