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Unit-4 Memory and I/O Interfacing Q1) Explain External ROM interfacing?A1)
Figure . Interfacing of ROM/EPROM to μC 8051 The above figure shows how to interface ROM to 8051. Port 0 is used as multiplexed data and address lines. It gives lower order (A7-A0) 8-bit address in initial T cycle and higher order (A8-A150 as data bus. The 8-bit address is latched using external latch and ALE signal from 8051. Port 2 provides higher order 9A15-A8) 8-bit address. PSEN is used to activate the output enable signal of external ROM/EPROM. Q2) Explain External RAM Interfacing?A2)
Figure. Interfacing of RAM with μC 8051 The above figure shows how to connect or interface external RAM(data memory) to 8051. Port 0 is used as multiplexed data & address lines. Address lines are decoded using external latch & ALE signal from 8051 to provide lower order (A7-A0) address lines. Port 2 gives higher order address lines. RD & WR signals from 8051 selects the memory read & memory write operations, respectively. Q3) Write a short note on I/O expansion buses?A3)
Figure . 8051 CONNECTION TO THE 8255.For external memory interfacing to 8051 port 0 & port 2 are used as multiplexed address/data bus & higher order data bus respectively. If circuit needs on-chip peripherals e.g. serial I/O & interrupts then only port is available for I/On such situation, I/O expansions is necessary & it is achieved by using 8255. data bus of 8255 is connected to the port 0. address line A0 & A1, after latches are connected to A0 & A1 of the 8255.For external memory interfacing to 8051 port 0 & port 2 are used as multiplexed address/data bus & higher order data bus respectively. If the circuit needs on-chip peripherals then only port is available for I/O. In such situation I/O expansions is achieved by 8255. The address line Ao and A1 are connected to 8255 Ao A1. Q4) Explain control signals?A4)There are 3 control signals, EA,PSEN and ALE. These signals known as External Access (EA), Program Store Enable (PSEN), and Address Latch Enable (ALE) are used for external memory interfacing.
Figure . Inputs for OperationThe control signals are used for external memory interfacing. If there is no requirement of external memory interfacing then, EA pin is pulled high and two others PSEN and ALE are left alone. Q5) Explain ADC Interfacing of 8051?A5)Working:First the microcontroller provides a 500 KHz clock signal to ADC0808 because the Timer 0 interrupt as ADC requires clock signal to operate. Then the microcontroller sends a LOW to HIGH level signal to ALE pin (active-high pin) of ADC0808 to enable the latch in the address. By applying HIGH to LOW Level signal to SC (Start Conversion), ADC starts analog to digital conversion. And then wait for the EOC (End of Conversion) pin to go LOW. When EOC goes LOW, it means analog to digital conversion has been completed and data is ready to use. After this, microcontroller enables the output line by applying a HIGH to LOW signal to OE pin of ADC0808. ADC0808 gives ratio metric conversion output at its output pins. Radiometric conversion is given by Vin/(Vfs – Vz) = Dx / (Dmax – Dmin)Where:Vin is input voltage for conversionVfs is full scale voltageVz is zero voltageDx is data point being measuredDmax is maximum data limitDmin is minimum data limit. Interfacing Diagram:
Figure. Interfacing 8051 with ADC0808Program:
Q6) Explain DAC interfacing?A6)
Figure . Interfacing 8051 with DAC 0808Program:
Q7) Write a short note on timers?A7)The 8051 has two timers: timer0 and timer1. They can be used either as timers or as counters. Both timers are 16 bits wide. Since the 8051 is an 8-bit architecture, each 16-bit is accessed as two separate registers of low byte and high byte. Timer0 registers is a 16- bit register and accessed as low byte and high byte. The low byte is referred as a TL0 and the high byte is referred as TH0. These registers can be accessed like any other registers.
Figure 9.Timer0 Timer1 registers is also 16- bits register and is split into two bytes, referred to as TL1 and TH1.
Figure 10.Timer 1 TMOD (timer mode) Register: This is an 8-bit register which is used by both timers 0 and 1 to set the various timer modes. In this TMOD register, lower 4 bits are set aside for timer0 and the upper 4 bits are set aside for timer1.In each case, the lower 2 bits are used to set the timer mode and upper 2 bits to specify the operation.
Figure.11TMOD RegisterThe first bit is a GATE bit. Every timer has a means of start and stop. Some timers are done by software, some by hardware, and some by both software and hardware controls. In the hardware way of starting and stopping the timer is by an external source is achieved by making GATE=1 in the TMOD register. And if we change to GATE=0 then no external hardware to start and stop the timers. The second bit is C/T bit which is used to decide whether the timer is used as time delay generator or event counter. If this bit is 0 it is used as a timer and if it is 1 then it is used as counter. In upper or lower 4 bits, the last bits third and fourth are known as M1 and M0 respectively. These are used to select the timer mode.
Mode 1- It is a 16-bit timer which allows values from 0000 to FFFFH to be loaded into the timer’s registers TL and TH. After TH and TL are loaded with a 16-bit initial value, the timer must be started. This is done t by “SETB TR0” for timer 0 and “SETB TR1” for timer 1. After the timer is started. It starts count up until it reaches its limit of FFFFH. When it rolls over from FFFF to 0000H, it sets high a flag bit called TF (timer flag). This timer flag can be monitored. When this timer flag is raised, one option would be stop the timer with the instructions “CLR TR0“ or CLR TR1 for timer 0 and timer 1 respectively. Note that timer flag is TF0 for timer 0 and TF1 for timer1. After the timer reaches its limit and rolls over, in order to repeat the process the registers TH and TL must be reloaded with the original value and TF must be reset to 0. Mode0-Mode 0 is a 13-bit timer instead of 16-bit. The 13-bit counter hold values between 0000 to 1FFFH in TH-TL. Therefore, when the timer reaches its maximum of 1FFH, it rolls over to 0000, and TF is raised. Mode 2- It is an 8bit timer which allows values from 00 to FFH to be loaded into the timer’s register TH. After TH is loaded with 8bit value, the 8051 gives a copy of it to TL. Then the timer is started which is done by the instruction “SETB TR0” for timer 0 and “SETB TR1” for timer1. After timer is started, it starts to count by incrementing the TL register. until it reaches its limit of FFH. When it rolls over from FFH to 00. It sets high the TF (timer flag). If we are using timer 0, TF0 goes high. If TF1 is used then TF1 is raised. When Tl register rolls from FFH to 00 and TF is set to 1, TL is reloaded automatically with the original value and kept in TH register. To repeat the process clear TF. This makes mode 2 auto reload, in contrast in mode 1 in which programmer has to reload TH and TL. Mode3- Mode 3 is also known as a split timer mode. Timer 0 and 1 may be programmed to be in mode 0, 1 and 2 independently. Timers do not operate independently if mode 3 is chosen for timer 0. Placing timer 1 in mode 3 causes it to stop counting; the control bit TR1 and the timer 1 flag TF1 are then used by timer0.TCON Register Bits and symbol and functions of every bits of TCON are as follows:
Figure .TCON Register
Q8) Write a short note on counters?A8)In the counter mode, the external events are counted. In this mode, the timer register is incremented for each 1 to 0 transition of the external input pin. This type of transitions is treated as events. To determine the 1or 0 transitions, another machine cycle will be needed. So, in this mode, at least two machine cycles are needed. There are four different modes of the Timer or Counter. The Mode 0 to Mode 2 are for both of the Timer/Counter. Mode 3 has a different meaning for each timer register. There is a register called TMOD. This register can be programmed to configure these timers or counters. TMOD RegisterTMOD(Timer Mode) is an SFR. The address of this register is 89H. This is not bit-addressable.The circuit that controls the running of the timers is shown in the figure.
Figure . Timers
The Gate bit will be high when the timer or counter is in mode 0 to 2. Q9) Explain with the help of example the operation of timers?A9)MOVTMOD,#25HThe above instruction is executed, then the timer/counter will be controlled by the software. To configure the system as hardware controlled mode, then the gate bits will be 1. The bit patterns will be 1 0 1 0 1 1 0 1 = ADHThen use this instruction:MOV TMOD, #0ADHMode 0 of Timer/CounterThe Mode 0 operation is the 8-bit timer or counter with a 5-bit pre-scaler. It is a 13-bit timer/counter. It uses 5 bits of TL0 or TL1 and all of the 8-bits of TH0 or TH1.
Figure. Timer selectionIn this example the Timer1is selected, every 32 (25)event for counter operations or 32 machine cycles for timer operation, the TH1 register will be incremented by 1. When the TH1overflows from FFH to 00H, then the TF1 of TCON register will be high, and it stops the timer/counter.Example, we can say that if the TH1 is holding F0H, and it is in timer mode, then TF1will be high after 10H * 32 = 512 machine cycles.MOVTMOD,#00HMOV TH1,#0F0HMOV IE,#88HSETB TR1In the above program, the Timer1 is configured as timer mode 0. In this case Gate = 0. Then the TH1 will be loaded with F0H, then enable the Timer1 interrupt. At last set the TR1 of TCON register, and start the timer.Mode 1 of Timer/CounterThe Mode 1 operation is the 16-bit timer or counter. In the following diagram, we are using Mode 1 for Timer0.
Figure . Timer OperationIn this case every event for counter operations or machine cycles for timer operation, the TH0– TL0 register-pair will be incremented by 1. When the register pair overflows from FFFFH to 0000H, then the TF0 of TCON register will be high, and it stops the timer/counter. Example, we can say that if the TH0 – TL0 register pair is holding FFF0H, and it is in timer mode, then TF0 will be high after 10H = 16 machine cycles. When the clock frequency is 12MHz, then the following instructions generate an interrupt 16 µs after Timer0 starts running.MOV TMOD,#01HMOV TLO,#F0HMOV TH0, #0FFHMOV IE,#82HSETB TR0 In the above program, the Timer0 is configured as timer mode 1. In this case Gate = 0. Then the TL0 will be loaded with F0H and TH0 is loaded with FFH, then enable the Timer0 interrupt. At last set the TR0 of TCON register, and start the timer.Mode 2 of Timer/CounterThe Mode 2 operation is the 8-bit auto reload timer or counter. In the following diagram, we are using Mode 2 for Timer1.
Figure . Mode 2In this case every event for counter operations or machine cycles for timer operation, the TL1register will be incremented by 1. When the register pair overflows from FFH to 00H, then the TF1 of TCON register will be high, also theTL1 will be reloaded with the content of TH1 and starts the operation again. Example, If the TH1 and TL1 register both are holding F0H and it is in timer mode, then TF1 will be high after 10H= 16 machine cycles. When the clock frequency is 12MHz this happens after 16 µs, then the following instructions generate an interrupt once every 16 µs after Timer1 starts runningMOV TMOD,#20HMOV TL1,#0F0HMOV TH1,#0F0HMOV #88HSETBTR1In the above program, the Timer1 is configured as timer mode 2. In this case Gate = 0. Then the TL1 and TH1 are loaded with F0H. then enable the Timer1 interrupt. At last set the TR1 of TCON register, and start the timer.Timer1 in mode 2 generates the desired baud rate when the serial port is working on Mode 1 or 3.Q10) Explain Memory Devices?A10)The memory types are: On-Chip Memory, External Code Memory, and External RAM. On-Chip Memory refers to any memory (Code, RAM, or other) that physically exists on the microcontroller itself. External Code Memory is code (or program) memory that resides off-chip. This is often in the form of an external EPROM. External RAM is RAM memory that resides off-chip. This is often in the form of standard static RAM or flash RAM.
Figure. Memory Types
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SOC EQU P2.6 EOC EQU P2.5 OE EQU P2.4 ALE EQU P2.3 ADDR_C EQU P2.2 ADDR_B EQU P2.1 ADDR_A EQU P2.0ORG 0000H MOV P1, #0FFH SETB P2.5 CLR SOC CLR OE CLR ALE AGAIN: CLR ADDR_C CLR ADDR_B CLR ADDR_A SETB SOC SET ALE ACALL DELAY CLR SOC CLR ALE BACK: JB EOC BACK HERE: JNB EOC HERE SETB OE MOV A,P1 ACALL CONVERSION ACALL DISPLAY AGAIN: SJMP AGAIN.
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ORG 000H MOV P1, #00H call squarwave call triwave call stairwave jmp repeat squarwave: MOV P1,#FFH call delay2sec MOV P1,#00H call delay2sec ret triwave: MOV R7,#00H triwave1: MOV P1,R7 inc R7 cjne R7, #FFH, triwave1 MOV R7, #FFh Triwave2: MOV P1, R7 djnz R7, triwave2 RET Stairwave: MOV P1, #00H call delay2sec MOV P1, #20H Call delay2sec MOV P1, #40H Call delay2sec RET delay1sec: MOV R0,#10 del2 : MOV R1,#250 del1: MOV R2,#250 DJNZ R2,$ DJNZ R1,del2 DJNZ R0,del1 RET Delay2sec: MOV R0,#20 del2 : MOV R1,#250 del1: MOV R2,#250 DJNZ R2,$ DJNZ R1,del21 DJNZ R0,del22 RET END
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M0 | M1 | Mode | Operating Mode |
0 | 0 | 0 | 13-bit timer mode. 8 bit timer/counter THx and TLx as –bit prescalar |
0 | 1 | 1 | 16-bit timer mode , 16-bit timers/counters THx and TLx as 5-bit prescalar |
1 | 0 | 2 | 8-bit auto reload mode, 8-bit auto reload timer/counter; THx holds a value which is to be reloaded into TLx each time it overflows |
1 | 1 | 3 | Split timer mode |
TF1 | TR1 | TF0 | TR0 | IE1 | IT1 | IE0 | IT0 |
Bit | Symbol | Functions |
7 | TF1 | Timer1 overflow flag. Set when timer rolls from all 1’s to 0 |
6 | TR1 | Timer 1 run control bit. Set to 1 by programmer to enable timer to count. |
5 | TF0 | Timer 0 overflow flag |
4 | TR0 | Timer 0 run control bit |
3 | IE1 | External Interrupt 1 edge flag |
2 | IT1 | External Interrupt 1 signal type control bit |
1 | IE0 | External Interrupt 0 edge flag |
0 | IT0 | External Interrupt 0 signal type control bit |
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Bit Details | High Value(1) | Low Value(0) |
C/T | Configure for the Counter operations | Configure for the Timer operations |
Gate (G) | Timer0 or Timer1 will be in RunMode when TRX bit of TCON register is high. | Timer0 or Timer1 will be in RunMode when TRX bit of TCON register is high and INT0 or INT1 is high. |
Bit Details | 00 | 01 | 10 | 11 |
M1 M0 | This is for Mode 0. (8-bit timer/counter, with 5-bit pre-scaler) | This is Mode 1. (16-bit timer/counter) | This is Mode 3 (8-bit auto reload-timer/counter) | This is Mode 3 (The function depends on Timer0 or Timer1) |
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