UNIT - 2

PLD Architectures

Q1) Draw and explain PROM architecture.

Q2) Compare PLA and PAL.

Q3) Draw PLA and explain with the help of truth table.

Q4) F1 = AB’C’ + AB’C + ABC’ + ABC
F2 = A’BC + AB’C + ABC
Implement PLA for the above Boolean expressions.

Q5) Implement the following Boolean expression with the help of programmable array logic (PAL)

X =AB + AC’
Y= AB’ + BC’

Q6) Draw and explain CPLD architecture.

Q7) Write some features and specifications of CPLD.

Q8) Write some features and specifications of FPGA.

Q9) Draw and explain FPGA architecture.

Q10) Compare CPLD and FPGA.