UNIT - 6

Testability

Q1) Explain types of faults in VLSI.

Q2) What is the need of Design for Testability?

Q3) What is a fault model? Explain basic fault models in digital circuits.

Q4) Write short notes on static and dynamic faults.

Q5) Draw and explain path sensitization method.

Q6) Draw and explain sequential circuit test.

Q7) Explain BIST.

Q8) Explain ATPG and its types.

Q9) What is JTAG and boundary scan? Explain in detail.

Q10) Compare JTAG and boundary scan.

Q11) TAP controller is a finite state machine. Explain.