undefined | unit 3 different parallel processing architectures

ACA

UNIT 3

Different parallel processing architectures

Q1) What Are The Different Types Of Interrupts In A Microprocessor System, Explain?

A1)

In the normal execution of a program there are three types of interrupts that can cause a break:

External Interrupts: These types of interrupts generally come from external input / output devices which are connected externally to the processor. They are generally independent and oblivious of any programming that is currently running on the processor.

Internal Interrupts: They are also known as traps and their causes could be due to some illegal operation or the erroneous use of data. Instead of being triggered by an external event they are usually triggered due to any exception that has been caused by the program itself. Some of the causes of these types of interrupts can be due to attempting a division by zero or an invalid opcode etc.

Software interrupts: These types if interrupts can occur only during the execution of an instruction. They can be used by a programmer to cause interrupts if need be. The primary purpose of such interrupts is to switch from user mode to supervisor mode.

Q2) What Is Virtual Memory in Computer?

A2)

Virtual memory is that when the available RAM memory is not sufficient for the system to run the current applications it will take some memory from hard disk. This memory is termed as Virtual memory.

Q3) State Some Of The Common Rules Of Assembly Language?

A3)

Some of the common rules of assembly level language are as follows:

In assembly language the label field can be either empty or may specify a symbolic address.

Instruction fields can specify pseudo or machine instructions.

Comment fields can be left empty or can be commented with.

Up to 4 characters are only allowed in the case of symbolic addresses.

The symbolic addresses field are terminated by a comma whereas the comment field begins with a forward slash.

Q4) Explain How Many Types Of Memory In Computer Architecture?

A4)

Computer have different type of memory like primary memory , Auxiliary memory , buffer memory , Cache memory , virtual memory ,the work of all memory heterogeneously primary memory is directly communicate with the CPU . Auxiliary memory are used for storing the data for long time . Buffer memory are mainly used for storing the intermediate data between the travel . cache memory are used for storing the those data that currently required at process time for increase the speed of the data . virtual memory are put in between the two memory for increase the speed of data or instruction it means it put between HDD and RAM .

Q5) What Do You Understand Vertical Micro Code, Explain The Designing Strategy Of A Control Unit Coded On Vertical Code?

A5)

Vertical microcode can be considered to be a segment of code or operators that have been clubbed together into fields. In this field every micro operation is given a unique value.

This helps in efficient organization of related code together.

An effective design strategy could be in case of 2 micro operations occurring at the same state, to assign them two different fields.

A no operation NOP can be included in each field if necessary.

The remaining micro operations can be distributed among the other operation field bits.

Also micro operations that modify the same registers could be grouped together in the same field.

Q6) Explain What Are The Different Hazards? How Do We Avoid Them?

A6)

There are situations, called hazards, that prevent the next instruction in the instruction stream from executing during its designated clock cycle. Hazards reduce the performance from the ideal speedup gained by pipelining.

There are three classes of Hazards:

Structural Hazards: It arise from resource conflicts when the hardware cannot support all possible combinations of instructions simultaneously in overlapped execution.

Data Hazards: It arise when an instruction depends on the results of previous instruction in a way that is exposed by the overlapping of instructions in the pipeline.

Control Hazards: It arise from the pipelining of branches and other instructions that change the PC.

Q7) Briefly Explain The Two Hardware Methods To Establish Priority?

A7)

Two different ways of establishing hardware priority are Daisy Chaining and parallel priority.

Daisy chaining is a form of a hardware implementation of the polling procedure.

Parallel priority is quicker of the two and uses a priority encoder to establish priorities.

In parallel priority interrupt a register is used for which the bits are separated by the interrupt signals from every device.

The parallel priority interrupt may also contain a mask register which is primarily used to control the status of every request regarding interrupts.

Q8) Instead Of Just 5-8 Pipe Stages Why Not Have, Say, A Pipeline With 50 Pipe Stages?

A8)

The latency of the architecture increases with the pipeline stages. Penalty due to the flushing of the pipeline for instance will also increase Cycles Per Instruction of the CPU architecture.

Q9) Explain the Requirement of Page-table And the Different Ways in Which the Table Can Be Organized?

A9)

For any computer generally the memory space is lesser as compared to the address space this implies that the main memory is lesser as compared to the secondary memory.

On the basis of the demands of the CPU data is transferred between the two memories.

Due to this a mapping technique is required which can be implemented using page-table.

The page table can be organized in two ways namely in the R/W memory and by using associative logic.

In case of R/W memory the speed of execution of programs is slow as it requires two main memory references to read data. It is also known as memory page table.

In case of associative logic it is considered to be more effective because it can be built with simply keeping mind to have equal no. of blocks in the memory as many as there are words.

Q10) Explain The Cpu Is Busy But You Want To Stop And Do Some Other Task. How Do You Do It?

A10)

Arise a non-mask able interrupt. Then give jump instruction to required subroutine.

Sign Up