Biju Patnaik University of Technology, Odisha, Mechanical Engineering Semester 4, Digital Systems Design Syllabus

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Unit - 1 Revision of Number System

1.1 Revision of Number System Introduction to various number systems and their Conversion

1.2 Arithmetic Operation using 1’s and 2s Compliments

1.3 Signed Binary and FloatingPoint Number

1.4 Representation Introduction to Binary codes and their applications

1.5 Revision Boolean Algebra and Logic Gates Boolean algebra and identities


1.7 Logic gates and truth tables

1.8 Universal logic gates


Unit - 2 Combinational Logic Design

2.1 Combinational Logic Design Specifying the Problem

2.2 Canonical Logic Forms

2.3 Extracting Canonical Forms

2.4 EXOR Equivalence Operations Logic Array

2.5 KMaps Two Three and Four variable Kmaps

2.6 NAND and NOR Logic Implementations.


2.8 Binary Adders Subtraction and Multiplication

2.9 An Equality Detector and comparator

2.10 Line Decoder

2.11 Encoders

2.12 Multiplexers and Demultiplexers

Unit - 3 Synchronous Sequential logic Design

3.1 Sequential circuits

3.2 Storage elements Latches SR D

3.3 Storage elements Flipflop’s inclusion of MasterSlave

3.4 Characteristics equation and state diagram of each FFs

3.5 Conversion of FlipFlops

3.6 Analysis of Clocked Sequential circuits

3.7 Mealy and Moore Models of Finite State Machines.

Unit - 4 Binary Counters

4.1 Binary Counters Introduction Principle and design of synchronous and asynchronous counters

4.2 Design of MODN counters

4.3 Ring counters

4.4 Decade counters

4.5 State Diagram of binary counters.

4.6 Shift resistors Principle of 4bit shift resistors

4.7 Shifting principle Timing Diagram SISO SIPO PISO and PIPO resistors.

4.8 Memory and Programmable Logic Types of Memories

4.9 Memory Decoding error detection and correction

4.10 RAM and ROMs.

4.11 Programmable Logic Array

4.12 Programmable Array Logic

4.13 Sequential Programmable Devices

Unit - 5 IC Logic Families

5.1 Properties DTL RTL TTL I2L and CMOS and its gate level implementation

5.2 AD converters and DA converters

5.3 Basic hardware description language Introduction to VerilogVHDL programming language

5.4 VerilogVHDL program of logic gates adders Subtractors Multiplexers Comparators Decoders flipflops counters Shift resistors.

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Other Subjects of Semester-2
Data structure
Constitution of india
Organisational behaviour
Engineering thermodynamics
Kinematics & dynamics of machines
Microprocessor and microcontroller
Introduction to physical metallurgy and engineering materials
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